0787bc6184
On MpCore system, the primary core can now be any core of the system. To identify the primary core, you can use 'gArmTokenSpaceGuid.PcdArmPrimaryCoreMask' and 'gArmTokenSpaceGuid.PcdArmPrimaryCore'. These PCDs by default use the ClusterId and CoreId to identify the core. And the primary core is defined as the ClusetrId=0 and CoreId=0. The helper macros are: IS_PRIMARY_CORE(MpId), GET_CORE_ID(MpId), GET_CLUSTER_ID(MpId), GET_CORE_POS(MpId), PRIMARY_CORE_ID. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12412 6f19259b-4bc3-4df7-8a09-765794883524
64 lines
1.7 KiB
C
64 lines
1.7 KiB
C
/** @file
|
|
* Main file supporting the transition to PEI Core in Normal World for Versatile Express
|
|
*
|
|
* Copyright (c) 2011, ARM Limited. All rights reserved.
|
|
*
|
|
* This program and the accompanying materials
|
|
* are licensed and made available under the terms and conditions of the BSD License
|
|
* which accompanies this distribution. The full text of the license may be found at
|
|
* http://opensource.org/licenses/bsd-license.php
|
|
*
|
|
* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
|
|
* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
|
|
*
|
|
**/
|
|
#ifndef __PREPEICORE_H_
|
|
#define __PREPEICORE_H_
|
|
|
|
#include <Library/DebugLib.h>
|
|
#include <Library/PcdLib.h>
|
|
|
|
#include <PiPei.h>
|
|
#include <Ppi/TemporaryRamSupport.h>
|
|
|
|
|
|
EFI_STATUS
|
|
EFIAPI
|
|
SecTemporaryRamSupport (
|
|
IN CONST EFI_PEI_SERVICES **PeiServices,
|
|
IN EFI_PHYSICAL_ADDRESS TemporaryMemoryBase,
|
|
IN EFI_PHYSICAL_ADDRESS PermanentMemoryBase,
|
|
IN UINTN CopySize
|
|
);
|
|
|
|
VOID
|
|
SecSwitchStack (
|
|
INTN StackDelta
|
|
);
|
|
|
|
// Vector Table for Pei Phase
|
|
VOID PeiVectorTable (VOID);
|
|
|
|
VOID
|
|
EFIAPI
|
|
PrimaryMain (
|
|
IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
|
|
);
|
|
|
|
/*
|
|
* This is the main function for secondary cores. They loop around until a non Null value is written to
|
|
* SYS_FLAGS register.The SYS_FLAGS register is platform specific.
|
|
* Note:The secondary cores, while executing secondary_main, assumes that:
|
|
* : SGI 0 is configured as Non-secure interrupt
|
|
* : Priority Mask is configured to allow SGI 0
|
|
* : Interrupt Distributor and CPU interfaces are enabled
|
|
*
|
|
*/
|
|
VOID
|
|
EFIAPI
|
|
SecondaryMain (
|
|
IN UINTN MpId
|
|
);
|
|
|
|
#endif
|