ce3e0a906f
The BaseTools/Scripts/ConvertMasmToNasm.py script was used to convert X64/InitializeFpu.asm to X64/InitializeFpu.nasm. And, manually add .rdata section. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Liming Gao <liming.gao@intel.com>
61 lines
1.8 KiB
NASM
61 lines
1.8 KiB
NASM
;------------------------------------------------------------------------------
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;*
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;* Copyright (c) 2009 - 2012, Intel Corporation. All rights reserved.<BR>
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;* This program and the accompanying materials
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;* are licensed and made available under the terms and conditions of the BSD License
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;* which accompanies this distribution. The full text of the license may be found at
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;* http://opensource.org/licenses/bsd-license.php
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;*
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;* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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;* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;*
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;*
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;------------------------------------------------------------------------------
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SECTION .rdata
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;
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; Float control word initial value:
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; all exceptions masked, double-extended-precision, round-to-nearest
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;
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mFpuControlWord: DW 0x37F
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;
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; Multimedia-extensions control word:
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; all exceptions masked, round-to-nearest, flush to zero for masked underflow
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;
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mMmxControlWord: DD 0x1F80
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DEFAULT REL
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SECTION .text
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;
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; Initializes floating point units for requirement of UEFI specification.
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;
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; This function initializes floating-point control word to 0x027F (all exceptions
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; masked,double-precision, round-to-nearest) and multimedia-extensions control word
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; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
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; for masked underflow).
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;
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global ASM_PFX(InitializeFloatingPointUnits)
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ASM_PFX(InitializeFloatingPointUnits):
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;
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; Initialize floating point units
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;
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; The following opcodes stand for instruction 'finit'
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; to be supported by some 64-bit assemblers
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;
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DB 0x9B, 0xDB, 0xE3
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fldcw [mFpuControlWord]
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;
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; Set OSFXSR bit 9 in CR4
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;
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mov rax, cr4
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or rax, BIT9
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mov cr4, rax
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ldmxcsr [mMmxControlWord]
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ret
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