66edb631f8
The RVCT .asm files include AsmMacroIoLib.h only for the definition of LoadConstantToReg (), which makes it tedious to make change to that file without the risk of making the RVCT assembler unhappy. So simply replace LoadConstantToReg() with mov32, which does the right thing in all cases. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
127 lines
4.9 KiB
NASM
127 lines
4.9 KiB
NASM
//
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// Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <Base.h>
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#include <Library/ArmPlatformLib.h>
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#include <Drivers/PL35xSmc.h>
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#include <ArmPlatform.h>
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#include <AutoGen.h>
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INCLUDE AsmMacroIoLib.inc
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EXPORT ArmPlatformSecBootAction
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EXPORT ArmPlatformSecBootMemoryInit
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IMPORT PL35xSmcInitialize
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PRESERVE8
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AREA CTA9x4BootMode, CODE, READONLY
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//
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// For each Chip Select: ChipSelect / SetCycle / SetOpMode
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//
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VersatileExpressSmcConfiguration
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// NOR Flash 0
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DCD PL350_SMC_DIRECT_CMD_ADDR_CS(0)
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DCD PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV
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// NOR Flash 1
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DCD PL350_SMC_DIRECT_CMD_ADDR_CS(4)
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DCD PL350_SMC_SET_CYCLE_NAND_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_NAND_T_WC(0x3) :OR: PL350_SMC_SET_CYCLE_NAND_T_REA(0x1) :OR: PL350_SMC_SET_CYCLE_NAND_T_WP(0x7) :OR: PL350_SMC_SET_CYCLE_NAND_T_AR(0x1)
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_WR_BURST_LENGTH_CONT :OR: PL350_SMC_SET_OPMODE_SET_ADV
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// SRAM
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DCD PL350_SMC_DIRECT_CMD_ADDR_CS(2)
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DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0x8) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_ADV
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// Usb/Eth/VRAM
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DCD PL350_SMC_DIRECT_CMD_ADDR_CS(3)
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DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0xA) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x3) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x6)
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
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// Memory Mapped Peripherals
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DCD PL350_SMC_DIRECT_CMD_ADDR_CS(7)
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DCD PL350_SMC_SET_CYCLE_SRAM_T_RC(0x6) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WC(0x5) :OR: PL350_SMC_SET_CYCLE_SRAM_T_CEOE(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_WP(0x2) :OR: PL350_SMC_SET_CYCLE_SRAM_T_PC(0x1) :OR: PL350_SMC_SET_CYCLE_SRAM_T_TR(0x1)
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
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// VRAM
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DCD PL350_SMC_DIRECT_CMD_ADDR_CS(1)
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DCD 0x00049249
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DCD PL350_SMC_SET_OPMODE_MEM_WIDTH_32 :OR: PL350_SMC_SET_OPMODE_SET_RD_SYNC :OR: PL350_SMC_SET_OPMODE_SET_WR_SYNC
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VersatileExpressSmcConfigurationEnd
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/**
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Call at the beginning of the platform boot up
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This function allows the firmware platform to do extra actions at the early
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stage of the platform power up.
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Note: This function must be implemented in assembler as there is no stack set up yet
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**/
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ArmPlatformSecBootAction
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bx lr
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/**
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Initialize the memory where the initial stacks will reside
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This memory can contain the initial stacks (Secure and Secure Monitor stacks).
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In some platform, this region is already initialized and the implementation of this function can
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do nothing. This memory can also represent the Secure RAM.
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This function is called before the satck has been set up. Its implementation must ensure the stack
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pointer is not used (probably required to use assembly language)
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**/
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ArmPlatformSecBootMemoryInit
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mov r5, lr
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//
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// Initialize PL354 SMC
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//
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mov32 r1, ARM_VE_SMC_CTRL_BASE
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ldr r2, =VersatileExpressSmcConfiguration
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ldr r3, =VersatileExpressSmcConfigurationEnd
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blx PL35xSmcInitialize
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//
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// Page mode setup for VRAM
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//
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mov32 r2, VRAM_MOTHERBOARD_BASE
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// Read current state
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ldr r0, [r2, #0]
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ldr r0, [r2, #0]
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ldr r0, = 0x00000000
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str r0, [r2, #0]
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ldr r0, [r2, #0]
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// Enable page mode
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ldr r0, [r2, #0]
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ldr r0, [r2, #0]
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ldr r0, = 0x00000000
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str r0, [r2, #0]
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ldr r0, = 0x00900090
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str r0, [r2, #0]
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// Confirm page mode enabled
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ldr r0, [r2, #0]
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ldr r0, [r2, #0]
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ldr r0, = 0x00000000
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str r0, [r2, #0]
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ldr r0, [r2, #0]
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bx r5
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END
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