4059386c70
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
126 lines
2.5 KiB
C
126 lines
2.5 KiB
C
/** @file
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/DebugLib.h>
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#include <Library/PcdLib.h>
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STATIC
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VOID
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CacheRangeOperation (
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IN VOID *Start,
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IN UINTN Length,
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IN LINE_OPERATION LineOperation,
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IN UINTN LineLength
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)
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{
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UINTN ArmCacheLineAlignmentMask = LineLength - 1;
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// Align address (rounding down)
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UINTN AlignedAddress = (UINTN)Start - ((UINTN)Start & ArmCacheLineAlignmentMask);
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UINTN EndAddress = (UINTN)Start + Length;
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// Perform the line operation on an address in each cache line
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while (AlignedAddress < EndAddress) {
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LineOperation(AlignedAddress);
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AlignedAddress += LineLength;
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}
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ArmDataSynchronizationBarrier ();
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}
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VOID
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EFIAPI
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InvalidateInstructionCache (
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VOID
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)
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{
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ASSERT (FALSE);
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}
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VOID
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EFIAPI
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InvalidateDataCache (
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VOID
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)
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{
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ASSERT (FALSE);
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}
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VOID *
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EFIAPI
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InvalidateInstructionCacheRange (
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IN VOID *Address,
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IN UINTN Length
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)
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{
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CacheRangeOperation (Address, Length, ArmCleanDataCacheEntryToPoUByMVA,
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ArmDataCacheLineLength ());
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CacheRangeOperation (Address, Length,
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ArmInvalidateInstructionCacheEntryToPoUByMVA,
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ArmInstructionCacheLineLength ());
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ArmInstructionSynchronizationBarrier ();
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return Address;
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}
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VOID
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EFIAPI
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WriteBackInvalidateDataCache (
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VOID
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)
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{
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ASSERT (FALSE);
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}
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VOID *
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EFIAPI
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WriteBackInvalidateDataCacheRange (
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IN VOID *Address,
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IN UINTN Length
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)
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{
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CacheRangeOperation(Address, Length, ArmCleanInvalidateDataCacheEntryByMVA,
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ArmDataCacheLineLength ());
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return Address;
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}
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VOID
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EFIAPI
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WriteBackDataCache (
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VOID
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)
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{
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ASSERT (FALSE);
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}
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VOID *
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EFIAPI
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WriteBackDataCacheRange (
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IN VOID *Address,
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IN UINTN Length
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)
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{
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CacheRangeOperation(Address, Length, ArmCleanDataCacheEntryByMVA,
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ArmDataCacheLineLength ());
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return Address;
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}
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VOID *
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EFIAPI
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InvalidateDataCacheRange (
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IN VOID *Address,
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IN UINTN Length
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)
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{
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CacheRangeOperation(Address, Length, ArmInvalidateDataCacheEntryByMVA,
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ArmDataCacheLineLength ());
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return Address;
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}
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