https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
		
			
				
	
	
		
			35 lines
		
	
	
		
			788 B
		
	
	
	
		
			C
		
	
	
	
	
	
			
		
		
	
	
			35 lines
		
	
	
		
			788 B
		
	
	
	
		
			C
		
	
	
	
	
	
/** @file
 | 
						|
*
 | 
						|
*  Copyright (c) 2011-2017, ARM Limited. All rights reserved.
 | 
						|
*
 | 
						|
*  SPDX-License-Identifier: BSD-2-Clause-Patent
 | 
						|
*
 | 
						|
**/
 | 
						|
 | 
						|
#include "PrePi.h"
 | 
						|
 | 
						|
#include <Chipset/AArch64.h>
 | 
						|
 | 
						|
VOID
 | 
						|
ArchInitialize (
 | 
						|
  VOID
 | 
						|
  )
 | 
						|
{
 | 
						|
  // Enable Floating Point
 | 
						|
  if (FixedPcdGet32 (PcdVFPEnabled)) {
 | 
						|
    ArmEnableVFP ();
 | 
						|
  }
 | 
						|
 | 
						|
  if (ArmReadCurrentEL () == AARCH64_EL2) {
 | 
						|
    // Trap General Exceptions. All exceptions that would be routed to EL1 are routed to EL2
 | 
						|
    ArmWriteHcr (ARM_HCR_TGE);
 | 
						|
 | 
						|
    /* Enable Timer access for non-secure EL1 and EL0
 | 
						|
       The cnthctl_el2 register bits are architecturally
 | 
						|
       UNKNOWN on reset.
 | 
						|
       Disable event stream as it is not in use at this stage
 | 
						|
    */
 | 
						|
    ArmWriteCntHctl (CNTHCTL_EL2_EL1PCTEN | CNTHCTL_EL2_EL1PCEN);
 | 
						|
  }
 | 
						|
}
 |