9344f09215
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
208 lines
5.4 KiB
C
208 lines
5.4 KiB
C
/** @file
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Processor or Compiler specific defines and types for AArch64.
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Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>
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Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __PROCESSOR_BIND_H__
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#define __PROCESSOR_BIND_H__
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///
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/// Define the processor type so other code can make processor based choices
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///
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#define MDE_CPU_AARCH64
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//
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// Make sure we are using the correct packing rules per EFI specification
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//
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#if !defined(__GNUC__) && !defined(__ASSEMBLER__)
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#pragma pack()
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#endif
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#if defined(_MSC_EXTENSIONS)
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//
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// Disable some level 4 compilation warnings (same as IA32 and X64)
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//
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//
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// Disabling bitfield type checking warnings.
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//
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#pragma warning ( disable : 4214 )
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//
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// Disabling the unreferenced formal parameter warnings.
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//
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#pragma warning ( disable : 4100 )
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//
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// Disable slightly different base types warning as CHAR8 * can not be set
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// to a constant string.
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//
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#pragma warning ( disable : 4057 )
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//
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// ASSERT(FALSE) or while (TRUE) are legal constructs so suppress this warning
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//
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#pragma warning ( disable : 4127 )
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//
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// This warning is caused by functions defined but not used. For precompiled header only.
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//
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#pragma warning ( disable : 4505 )
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//
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// This warning is caused by empty (after preprocessing) source file. For precompiled header only.
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//
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#pragma warning ( disable : 4206 )
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//
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// Disable 'potentially uninitialized local variable X used' warnings
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//
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#pragma warning ( disable : 4701 )
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//
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// Disable 'potentially uninitialized local pointer variable X used' warnings
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//
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#pragma warning ( disable : 4703 )
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//
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// use Microsoft* C compiler dependent integer width types
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//
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typedef unsigned __int64 UINT64;
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typedef __int64 INT64;
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typedef unsigned __int32 UINT32;
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typedef __int32 INT32;
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typedef unsigned short UINT16;
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typedef unsigned short CHAR16;
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typedef short INT16;
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typedef unsigned char BOOLEAN;
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typedef unsigned char UINT8;
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typedef char CHAR8;
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typedef signed char INT8;
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#else
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//
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// Assume standard AARCH64 alignment.
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//
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typedef unsigned long long UINT64;
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typedef long long INT64;
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typedef unsigned int UINT32;
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typedef int INT32;
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typedef unsigned short UINT16;
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typedef unsigned short CHAR16;
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typedef short INT16;
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typedef unsigned char BOOLEAN;
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typedef unsigned char UINT8;
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typedef char CHAR8;
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typedef signed char INT8;
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#endif
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///
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/// Unsigned value of native width. (4 bytes on supported 32-bit processor instructions,
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/// 8 bytes on supported 64-bit processor instructions)
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///
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typedef UINT64 UINTN;
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///
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/// Signed value of native width. (4 bytes on supported 32-bit processor instructions,
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/// 8 bytes on supported 64-bit processor instructions)
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///
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typedef INT64 INTN;
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//
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// Processor specific defines
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//
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///
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/// A value of native width with the highest bit set.
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///
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#define MAX_BIT 0x8000000000000000ULL
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///
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/// A value of native width with the two highest bits set.
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///
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#define MAX_2_BITS 0xC000000000000000ULL
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///
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/// Maximum legal AARCH64 address
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///
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#define MAX_ADDRESS 0xFFFFFFFFFFFFFFFFULL
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///
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/// Maximum usable address at boot time (48 bits using 4 KB pages)
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///
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#define MAX_ALLOC_ADDRESS 0xFFFFFFFFFFFFULL
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///
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/// Maximum legal AArch64 INTN and UINTN values.
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///
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#define MAX_INTN ((INTN)0x7FFFFFFFFFFFFFFFULL)
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#define MAX_UINTN ((UINTN)0xFFFFFFFFFFFFFFFFULL)
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///
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/// Minimum legal AArch64 INTN value.
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///
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#define MIN_INTN (((INTN)-9223372036854775807LL) - 1)
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///
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/// The stack alignment required for AARCH64
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///
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#define CPU_STACK_ALIGNMENT 16
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///
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/// Page allocation granularity for AARCH64
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///
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#define DEFAULT_PAGE_ALLOCATION_GRANULARITY (0x1000)
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#define RUNTIME_PAGE_ALLOCATION_GRANULARITY (0x10000)
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//
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// Modifier to ensure that all protocol member functions and EFI intrinsics
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// use the correct C calling convention. All protocol member functions and
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// EFI intrinsics are required to modify their member functions with EFIAPI.
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//
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#define EFIAPI
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// When compiling with Clang, we still use GNU as for the assembler, so we still
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// need to define the GCC_ASM* macros.
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#if defined(__GNUC__) || defined(__clang__)
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///
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/// For GNU assembly code, .global or .globl can declare global symbols.
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/// Define this macro to unify the usage.
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///
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#define ASM_GLOBAL .globl
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#define GCC_ASM_EXPORT(func__) \
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.global _CONCATENATE (__USER_LABEL_PREFIX__, func__) ;\
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.type ASM_PFX(func__), %function
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#define GCC_ASM_IMPORT(func__) \
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.extern _CONCATENATE (__USER_LABEL_PREFIX__, func__)
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#endif
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/**
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Return the pointer to the first instruction of a function given a function pointer.
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On ARM CPU architectures, these two pointer values are the same,
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so the implementation of this macro is very simple.
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@param FunctionPointer A pointer to a function.
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@return The pointer to the first instruction of a function given a function pointer.
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**/
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#define FUNCTION_ENTRY_POINT(FunctionPointer) (VOID *)(UINTN)(FunctionPointer)
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#ifndef __USER_LABEL_PREFIX__
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#define __USER_LABEL_PREFIX__
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#endif
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#endif
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