43df61878d
With "PcdCpuSmmEnableBspElection" set to FALSE, PiSmmCpuDxeSmm always
considers the processor with index 0 to be the SMM Monarch (a.k.a. the SMM
BSP). The SMM Monarch handles the SMI for real, while the other CPUs wait
in their SMM loops.
In a subsequent patch, we want to set "PcdCpuHotPlugSupport" to TRUE. For
that, PiCpuSmmEntry() [UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c] forces
us with an ASSERT() to set "PcdCpuSmmEnableBspElection" to TRUE as well.
To satisfy that expectation, we can simply remove our current
"PcdCpuSmmEnableBspElection|FALSE" setting, and inherit the default TRUE
value from "UefiCpuPkg.dec".
This causes "mSmmMpSyncData->BspIndex" in PiSmmCpuDxeSmm to lose its
static zero value (standing for CPU#0); instead it becomes (-1) in
general, and the SMM Monarch is elected anew on every SMI.
The default SMM Monarch Election is basically a race -- whichever CPU can
flip "mSmmMpSyncData->BspIndex" from (-1) to its own index, becomes king,
for handling that SMI. Refer to SmiRendezvous()
[UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c].
I consider this non-determinism less than ideal on QEMU/KVM; it would be
nice to stick with a "mostly permanent" SMM Monarch even with the Election
enabled. We can do that by implementing the PlatformSmmBspElection() API
in the SmmCpuPlatformHookLibQemu instance:
The IA32 APIC Base MSR can be read on each CPU concurrently, and it will
report the BSP bit as set only on the current Boot Service Processor. QEMU
marks CPU#0 as the BSP, by default.
Elect the current BSP, as reported by QEMU, for the SMM Monarch role.
(Note that the QEMU commit history is not entirely consistent on whether
QEMU/KVM may mark a CPU with nonzero index as the BSP:
- At tag v4.2.0, "target/i386/cpu.c" has a comment saying "We hard-wire
the BSP to the first CPU". This comment goes back to commit 6cb2996cef5e
("x86: Extend validity of bsp_to_cpu", 2010-03-04).
- Compare commit 9cb11fd7539b ("target-i386: clear bsp bit when
designating bsp", 2015-04-02) though, especially considering KVM.
Either way, this OvmfPkg patch is *not* dependent on CPU index 0; it just
takes the race on every SMI out of the game.)
One benefit of using a "mostly permanent" SMM Monarch / BSP is that we can
continue testing the SMM CPU synchronization by deterministically entering
the firmware on the BSP, vs. on an AP, from Linux guests:
$ time taskset -c 0 efibootmgr
$ time taskset -c 1 efibootmgr
(See
<https://github.com/tianocore/tianocore.github.io/wiki/Testing-SMM-with-QEMU,-KVM-and-libvirt#uefi-variable-access-test>.)
Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Cc: Igor Mammedov <imammedo@redhat.com>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Michael Kinney <michael.d.kinney@intel.com>
Cc: Philippe Mathieu-Daudé <philmd@redhat.com>
Suggested-by: Igor Mammedov <imammedo@redhat.com>
Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1512#c5
Signed-off-by: Laszlo Ersek <lersek@redhat.com>
Message-Id: <20200226221156.29589-5-lersek@redhat.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Tested-by: Boris Ostrovsky <boris.ostrovsky@oracle.com>
116 lines
3.5 KiB
C
116 lines
3.5 KiB
C
/** @file
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SMM CPU Platform Hook library instance for QEMU.
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Copyright (c) 2020, Red Hat, Inc.
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include <Library/BaseLib.h> // AsmReadMsr64()
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#include <PiSmm.h>
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#include <Register/Intel/ArchitecturalMsr.h> // MSR_IA32_APIC_BASE_REGISTER
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#include <Library/SmmCpuPlatformHookLib.h>
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/**
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Checks if platform produces a valid SMI.
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This function checks if platform produces a valid SMI. This function is
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called at SMM entry to detect if this is a spurious SMI. This function
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must be implemented in an MP safe way because it is called by multiple CPU
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threads.
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@retval TRUE There is a valid SMI
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@retval FALSE There is no valid SMI
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**/
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BOOLEAN
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EFIAPI
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PlatformValidSmi (
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VOID
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)
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{
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return TRUE;
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}
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/**
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Clears platform top level SMI status bit.
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This function clears platform top level SMI status bit.
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@retval TRUE The platform top level SMI status is cleared.
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@retval FALSE The platform top level SMI status cannot be
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cleared.
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**/
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BOOLEAN
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EFIAPI
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ClearTopLevelSmiStatus (
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VOID
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)
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{
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return TRUE;
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}
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/**
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Performs platform specific way of SMM BSP election.
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This function performs platform specific way of SMM BSP election.
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@param IsBsp Output parameter. TRUE: the CPU this function
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executes on is elected to be the SMM BSP. FALSE:
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the CPU this function executes on is to be SMM AP.
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@retval EFI_SUCCESS The function executes successfully.
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@retval EFI_NOT_READY The function does not determine whether this CPU
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should be BSP or AP. This may occur if hardware
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init sequence to enable the determination is yet to
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be done, or the function chooses not to do BSP
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election and will let SMM CPU driver to use its
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default BSP election process.
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@retval EFI_DEVICE_ERROR The function cannot determine whether this CPU
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should be BSP or AP due to hardware error.
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**/
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EFI_STATUS
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EFIAPI
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PlatformSmmBspElection (
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OUT BOOLEAN *IsBsp
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)
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{
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MSR_IA32_APIC_BASE_REGISTER ApicBaseMsr;
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ApicBaseMsr.Uint64 = AsmReadMsr64 (MSR_IA32_APIC_BASE);
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*IsBsp = (BOOLEAN)(ApicBaseMsr.Bits.BSP == 1);
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return EFI_SUCCESS;
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}
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/**
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Get platform page table attribute.
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This function gets page table attribute of platform.
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@param Address Input parameter. Obtain the page table entries
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attribute on this address.
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@param PageSize Output parameter. The size of the page.
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@param NumOfPages Output parameter. Number of page.
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@param PageAttribute Output parameter. Paging Attributes (WB, UC, etc).
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@retval EFI_SUCCESS The platform page table attribute from the address
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is determined.
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@retval EFI_UNSUPPORTED The platform does not support getting page table
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attribute for the address.
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**/
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EFI_STATUS
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EFIAPI
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GetPlatformPageTableAttribute (
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IN UINT64 Address,
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IN OUT SMM_PAGE_SIZE_TYPE *PageSize,
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IN OUT UINTN *NumOfPages,
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IN OUT UINTN *PageAttribute
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)
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{
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return EFI_UNSUPPORTED;
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}
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