0acd869796
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
44 lines
1.1 KiB
C
44 lines
1.1 KiB
C
/** @file
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X64 arch definition for CPU Exception Handler Library.
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Copyright (c) 2013, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef _ARCH_CPU_INTERRUPT_DEFS_H_
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#define _ARCH_CPU_INTERRUPT_DEFS_H_
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typedef struct {
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EFI_SYSTEM_CONTEXT_X64 SystemContext;
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BOOLEAN ExceptionDataFlag;
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UINTN OldIdtHandler;
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} EXCEPTION_HANDLER_CONTEXT;
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//
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// Register Structure Definitions
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//
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typedef struct {
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EFI_STATUS_CODE_DATA Header;
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EFI_SYSTEM_CONTEXT_X64 SystemContext;
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} CPU_STATUS_CODE_TEMPLATE;
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typedef struct {
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SPIN_LOCK SpinLock;
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UINT32 ApicId;
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UINT32 Attribute;
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UINTN ExceptonHandler;
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UINTN OldSs;
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UINTN OldSp;
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UINTN OldFlags;
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UINTN OldCs;
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UINTN OldIp;
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UINTN ExceptionData;
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UINT8 HookAfterStubHeaderCode[HOOKAFTER_STUB_SIZE];
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} RESERVED_VECTORS_DATA;
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#define CPU_TSS_DESC_SIZE sizeof (IA32_TSS_DESCRIPTOR)
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#define CPU_TSS_SIZE sizeof (IA32_TASK_STATE_SEGMENT)
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#endif
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