git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3 6f19259b-4bc3-4df7-8a09-765794883524
		
			
				
	
	
		
			89 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
			
		
		
	
	
			89 lines
		
	
	
		
			2.8 KiB
		
	
	
	
		
			ArmAsm
		
	
	
	
	
	
//++
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// Copyright (c) 2006, Intel Corporation                                                         
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// All rights reserved. This program and the accompanying materials                          
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// are licensed and made available under the terms and conditions of the BSD License         
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// which accompanies this distribution.  The full text of the license may be found at        
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// http://opensource.org/licenses/bsd-license.php                                            
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//                                                                                           
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             
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// 
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//  Module Name:
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//
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//    IpfCpuCache.s
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//
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//  Abstract:
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//
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//    Contains Misc assembly procedures to support IPF CPU AP.
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//
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// Revision History:
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//
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//--
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.file  "IpfCpuCache.s"
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#include  "IpfMacro.i"
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#include  "IpfDefines.h"
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//-----------------------------------------------------------------------------
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//++
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// Flush Cache
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//
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// Arguments : 
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// Input = in0 = Starting Address to Flush.
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// Input = in1 = Length in bytes.
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// Input = b0 = return branch register.
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// On Entry :
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//
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// Return Value: 
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//
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//  VOID
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//  SalFlushCache (
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//    IN UINT64   BaseToFlush,
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//    IN UINT64   LengthToFlush
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//    );
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//
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//--
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//---------------------------------------------------------------------------
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PROCEDURE_ENTRY (SalFlushCache)
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      NESTED_SETUP (5,8,0,0)
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      mov         loc2 = ar.lc
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      mov         loc3 = in0                  // Start address.
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      mov         loc4 = in1;;                // Length in bytes.
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      cmp.eq  p6,p7 = loc4, r0;;               // If Length is zero then don't flush any cache
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      (p6)  br.spnt.many DoneFlushingC;;         
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      add         loc4 = loc4,loc3 
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      mov         loc5 = 1;;
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      sub         loc4 = loc4, loc5 ;; // the End address to flush
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      dep         loc3 = r0,loc3,0,5          
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      dep         loc4 = r0,loc4,0,5;;         
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      shr         loc3 = loc3,5             
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      shr         loc4 = loc4,5;;    // 32 byte cache line
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      sub         loc4 = loc4,loc3;; // total flush count, It should be add 1 but 
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                                     // the br.cloop will first execute one time 
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      mov         loc3 = in0                  
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      mov         loc5 = 32      
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      mov         ar.lc = loc4;;
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StillFlushingC:
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      fc          loc3;; 
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      sync.i;;
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      srlz.i;;
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      add         loc3 = loc5,loc3;;
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      br.cloop.sptk.few StillFlushingC;;
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DoneFlushingC:      
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      mov         ar.lc = loc2     
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      NESTED_RETURN
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PROCEDURE_EXIT (SalFlushCache)
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