c5be19f378
Some platform doesn't require PciBus driver to assign resource to PCI devices which causes PciRootBridgeIo.Configuration() cannot return correct resource information to caller. When resource assignment by PciBus is not mandatory, only light version of PCI bus enumeration is performed, which only collects the device resource consumption and publishes the PciIo instance. The corresponding logic is in PciEnumeratorLight() in PciBus driver. But PciEnumeratorLight() still depends on PciRootBridgeIo.Configuration() returns the starting bus number in order to search down to find all PCI devices under the root bridge. When ResourceAssigned in PCI_ROOT_BRIDGE returned by PciHostBridgeGetRootBridges() is TRUE, PciHostBridge driver treats the Bus/Io/Mem/MemAbove4G/PMem/PMemAbove4G as the resource that are *actually assigned* to the root bridge, instead of the resource that *can be assigned* to the root bridge. So that PciRootBridgeIo.Configuration() can return the correct information. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ruiyu Ni <ruiyu.ni@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
104 lines
5.0 KiB
C
104 lines
5.0 KiB
C
/** @file
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PCI Host Bridge Library consumed by PciHostBridgeDxe driver returning
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the platform specific information about the PCI Host Bridge.
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Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are
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licensed and made available under the terms and conditions of
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the BSD License which accompanies this distribution. The full
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text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __PCI_HOST_BRIDGE_LIB_H__
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#define __PCI_HOST_BRIDGE_LIB_H__
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//
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// (Base > Limit) indicates an aperture is not available.
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//
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typedef struct {
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UINT64 Base;
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UINT64 Limit;
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} PCI_ROOT_BRIDGE_APERTURE;
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typedef struct {
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UINT32 Segment; ///< Segment number.
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UINT64 Supports; ///< Supported attributes.
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///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
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///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
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UINT64 Attributes; ///< Initial attributes.
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///< Refer to EFI_PCI_ATTRIBUTE_xxx used by GetAttributes()
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///< and SetAttributes() in EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.
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BOOLEAN DmaAbove4G; ///< DMA above 4GB memory.
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///< Set to TRUE when root bridge supports DMA above 4GB memory.
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BOOLEAN NoExtendedConfigSpace; ///< When FALSE, the root bridge supports
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///< Extended (4096-byte) Configuration Space.
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///< When TRUE, the root bridge supports
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///< 256-byte Configuration Space only.
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BOOLEAN ResourceAssigned; ///< Resource assignment status of the root bridge.
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///< Set to TRUE if Bus/IO/MMIO resources for root bridge have been assigned.
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UINT64 AllocationAttributes; ///< Allocation attributes.
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///< Refer to EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM and
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///< EFI_PCI_HOST_BRIDGE_MEM64_DECODE used by GetAllocAttributes()
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///< in EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.
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PCI_ROOT_BRIDGE_APERTURE Bus; ///< Bus aperture which can be used by the root bridge.
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PCI_ROOT_BRIDGE_APERTURE Io; ///< IO aperture which can be used by the root bridge.
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PCI_ROOT_BRIDGE_APERTURE Mem; ///< MMIO aperture below 4GB which can be used by the root bridge.
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PCI_ROOT_BRIDGE_APERTURE MemAbove4G; ///< MMIO aperture above 4GB which can be used by the root bridge.
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PCI_ROOT_BRIDGE_APERTURE PMem; ///< Prefetchable MMIO aperture below 4GB which can be used by the root bridge.
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PCI_ROOT_BRIDGE_APERTURE PMemAbove4G; ///< Prefetchable MMIO aperture above 4GB which can be used by the root bridge.
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EFI_DEVICE_PATH_PROTOCOL *DevicePath; ///< Device path.
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} PCI_ROOT_BRIDGE;
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/**
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Return all the root bridge instances in an array.
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@param Count Return the count of root bridge instances.
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@return All the root bridge instances in an array.
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The array should be passed into PciHostBridgeFreeRootBridges()
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when it's not used.
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**/
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PCI_ROOT_BRIDGE *
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EFIAPI
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PciHostBridgeGetRootBridges (
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UINTN *Count
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);
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/**
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Free the root bridge instances array returned from PciHostBridgeGetRootBridges().
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@param Bridges The root bridge instances array.
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@param Count The count of the array.
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**/
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VOID
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EFIAPI
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PciHostBridgeFreeRootBridges (
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PCI_ROOT_BRIDGE *Bridges,
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UINTN Count
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);
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/**
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Inform the platform that the resource conflict happens.
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@param HostBridgeHandle Handle of the Host Bridge.
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@param Configuration Pointer to PCI I/O and PCI memory resource descriptors.
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The Configuration contains the resources for all the
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root bridges. The resource for each root bridge is
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terminated with END descriptor and an additional END
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is appended indicating the end of the entire resources.
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The resource descriptor field values follow the description
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in EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.SubmitResources().
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**/
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VOID
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EFIAPI
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PciHostBridgeResourceConflict (
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EFI_HANDLE HostBridgeHandle,
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VOID *Configuration
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);
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#endif
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