727894d5c9
Support multiple PL061 controllers. If platform gpio driver couldn't be found, PL061 gpio driver will continue to load PcdPL061GpioBase as the register base. It could be compatible with the use case of current PL061 gpio driver. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Haojian Zhuang <haojian.zhuang@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
50 lines
1.7 KiB
C
50 lines
1.7 KiB
C
/** @file
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*
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* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#ifndef __PL061_GPIO_H__
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#define __PL061_GPIO_H__
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#include <Protocol/EmbeddedGpio.h>
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// PL061 GPIO Registers
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#define PL061_GPIO_DATA_REG_OFFSET ((UINTN) 0x000)
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#define PL061_GPIO_DATA_REG 0x000
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#define PL061_GPIO_DIR_REG 0x400
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#define PL061_GPIO_IS_REG 0x404
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#define PL061_GPIO_IBE_REG 0x408
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#define PL061_GPIO_IEV_REG 0x40C
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#define PL061_GPIO_IE_REG 0x410
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#define PL061_GPIO_RIS_REG 0x414
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#define PL061_GPIO_MIS_REG 0x410
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#define PL061_GPIO_IC_REG 0x41C
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#define PL061_GPIO_AFSEL_REG 0x420
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#define PL061_GPIO_PERIPH_ID0 0xFE0
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#define PL061_GPIO_PERIPH_ID1 0xFE4
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#define PL061_GPIO_PERIPH_ID2 0xFE8
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#define PL061_GPIO_PERIPH_ID3 0xFEC
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#define PL061_GPIO_PCELL_ID0 0xFF0
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#define PL061_GPIO_PCELL_ID1 0xFF4
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#define PL061_GPIO_PCELL_ID2 0xFF8
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#define PL061_GPIO_PCELL_ID3 0xFFC
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#define PL061_GPIO_PINS 8
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// All bits low except one bit high, native bit length
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#define GPIO_PIN_MASK(Pin) (1UL << ((UINTN)(Pin)))
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#endif // __PL061_GPIO_H__
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