In order to support PEI graphic, we let VTdPmrPei driver parse DMAR table RMRR entry and allow the UMA access. If a system has no PEI IGD, no RMRR is needed. The behavior is unchanged. If a system has PEI IGD, it must report RMRR in PEI phase. The PeiVTdPrm will program the IGD VTd engine to skip the RMRR region, and program the rest PCI VTd engine to skip the another DMA buffer allocated in PEI phase for other device driver. Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Jiewen Yao <jiewen.yao@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>
335 lines
9.2 KiB
C
335 lines
9.2 KiB
C
/** @file
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Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License which accompanies this distribution.
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The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include <PiPei.h>
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#include <Library/BaseLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/IoLib.h>
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#include <Library/DebugLib.h>
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#include <IndustryStandard/Vtd.h>
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#include <Ppi/VtdInfo.h>
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#include "IntelVTdPmrPei.h"
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extern VTD_INFO *mVTdInfo;
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/**
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Get protected low memory alignment.
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@param VtdUnitBaseAddress The base address of the VTd engine.
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@return protected low memory alignment.
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**/
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UINT32
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GetPlmrAlignment (
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IN UINTN VtdUnitBaseAddress
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)
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{
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UINT32 Data32;
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MmioWrite32 (VtdUnitBaseAddress + R_PMEN_LOW_BASE_REG, 0xFFFFFFFF);
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Data32 = MmioRead32 (VtdUnitBaseAddress + R_PMEN_LOW_BASE_REG);
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Data32 = ~Data32 + 1;
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return Data32;
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}
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/**
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Get protected high memory alignment.
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@param VtdUnitBaseAddress The base address of the VTd engine.
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@return protected high memory alignment.
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**/
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UINT64
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GetPhmrAlignment (
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IN UINTN VtdUnitBaseAddress
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)
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{
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UINT64 Data64;
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UINT8 HostAddressWidth;
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HostAddressWidth = mVTdInfo->HostAddressWidth;
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MmioWrite64 (VtdUnitBaseAddress + R_PMEN_HIGH_BASE_REG, 0xFFFFFFFFFFFFFFFF);
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Data64 = MmioRead64 (VtdUnitBaseAddress + R_PMEN_HIGH_BASE_REG);
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Data64 = ~Data64 + 1;
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Data64 = Data64 & (LShiftU64 (1, HostAddressWidth) - 1);
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return Data64;
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}
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/**
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Get protected low memory alignment.
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@param EngineMask The mask of the VTd engine to be accessed.
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@return protected low memory alignment.
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**/
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UINT32
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GetLowMemoryAlignment (
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IN UINT64 EngineMask
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)
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{
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UINTN Index;
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UINT32 Alignment;
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UINT32 FinalAlignment;
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FinalAlignment = 0;
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for (Index = 0; Index < mVTdInfo->VTdEngineCount; Index++) {
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if ((EngineMask & LShiftU64(1, Index)) == 0) {
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continue;
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}
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Alignment = GetPlmrAlignment ((UINTN)mVTdInfo->VTdEngineAddress[Index]);
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if (FinalAlignment < Alignment) {
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FinalAlignment = Alignment;
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}
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}
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return FinalAlignment;
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}
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/**
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Get protected high memory alignment.
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@param EngineMask The mask of the VTd engine to be accessed.
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@return protected high memory alignment.
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**/
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UINT64
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GetHighMemoryAlignment (
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IN UINT64 EngineMask
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)
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{
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UINTN Index;
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UINT64 Alignment;
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UINT64 FinalAlignment;
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FinalAlignment = 0;
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for (Index = 0; Index < mVTdInfo->VTdEngineCount; Index++) {
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if ((EngineMask & LShiftU64(1, Index)) == 0) {
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continue;
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}
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Alignment = GetPhmrAlignment ((UINTN)mVTdInfo->VTdEngineAddress[Index]);
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if (FinalAlignment < Alignment) {
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FinalAlignment = Alignment;
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}
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}
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return FinalAlignment;
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}
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/**
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Enable PMR in the VTd engine.
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@param VtdUnitBaseAddress The base address of the VTd engine.
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@retval EFI_SUCCESS The PMR is enabled.
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@retval EFI_UNSUPPORTED The PMR is not supported.
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**/
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EFI_STATUS
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EnablePmr (
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IN UINTN VtdUnitBaseAddress
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)
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{
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UINT32 Reg32;
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VTD_CAP_REG CapReg;
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CapReg.Uint64 = MmioRead64 (VtdUnitBaseAddress + R_CAP_REG);
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if (CapReg.Bits.PLMR == 0 || CapReg.Bits.PHMR == 0) {
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return EFI_UNSUPPORTED;
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}
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Reg32 = MmioRead32 (VtdUnitBaseAddress + R_PMEN_ENABLE_REG);
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if ((Reg32 & BIT0) == 0) {
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MmioWrite32 (VtdUnitBaseAddress + R_PMEN_ENABLE_REG, BIT31);
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do {
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Reg32 = MmioRead32 (VtdUnitBaseAddress + R_PMEN_ENABLE_REG);
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} while((Reg32 & BIT0) == 0);
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}
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return EFI_SUCCESS;
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}
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/**
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Disable PMR in the VTd engine.
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@param VtdUnitBaseAddress The base address of the VTd engine.
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@retval EFI_SUCCESS The PMR is disabled.
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@retval EFI_UNSUPPORTED The PMR is not supported.
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**/
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EFI_STATUS
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DisablePmr (
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IN UINTN VtdUnitBaseAddress
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)
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{
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UINT32 Reg32;
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VTD_CAP_REG CapReg;
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CapReg.Uint64 = MmioRead64 (VtdUnitBaseAddress + R_CAP_REG);
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if (CapReg.Bits.PLMR == 0 || CapReg.Bits.PHMR == 0) {
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return EFI_UNSUPPORTED;
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}
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Reg32 = MmioRead32 (VtdUnitBaseAddress + R_PMEN_ENABLE_REG);
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if ((Reg32 & BIT0) != 0) {
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MmioWrite32 (VtdUnitBaseAddress + R_PMEN_ENABLE_REG, 0x0);
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do {
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Reg32 = MmioRead32 (VtdUnitBaseAddress + R_PMEN_ENABLE_REG);
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} while((Reg32 & BIT0) != 0);
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}
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return EFI_SUCCESS;
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}
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/**
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Set PMR region in the VTd engine.
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@param VtdUnitBaseAddress The base address of the VTd engine.
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@param LowMemoryBase The protected low memory region base.
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@param LowMemoryLength The protected low memory region length.
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@param HighMemoryBase The protected high memory region base.
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@param HighMemoryLength The protected high memory region length.
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@retval EFI_SUCCESS The PMR is set to protected region.
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@retval EFI_UNSUPPORTED The PMR is not supported.
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**/
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EFI_STATUS
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SetPmrRegion (
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IN UINTN VtdUnitBaseAddress,
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IN UINT32 LowMemoryBase,
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IN UINT32 LowMemoryLength,
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IN UINT64 HighMemoryBase,
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IN UINT64 HighMemoryLength
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)
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{
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VTD_CAP_REG CapReg;
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UINT32 PlmrAlignment;
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UINT64 PhmrAlignment;
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DEBUG ((DEBUG_INFO, "VtdUnitBaseAddress - 0x%x\n", VtdUnitBaseAddress));
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CapReg.Uint64 = MmioRead64 (VtdUnitBaseAddress + R_CAP_REG);
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if (CapReg.Bits.PLMR == 0 || CapReg.Bits.PHMR == 0) {
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DEBUG ((DEBUG_ERROR, "PLMR/PHMR unsupported\n"));
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return EFI_UNSUPPORTED;
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}
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PlmrAlignment = GetPlmrAlignment (VtdUnitBaseAddress);
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DEBUG ((DEBUG_INFO, "PlmrAlignment - 0x%x\n", PlmrAlignment));
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PhmrAlignment = GetPhmrAlignment (VtdUnitBaseAddress);
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DEBUG ((DEBUG_INFO, "PhmrAlignment - 0x%lx\n", PhmrAlignment));
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if ((LowMemoryBase != ALIGN_VALUE(LowMemoryBase, PlmrAlignment)) ||
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(LowMemoryLength != ALIGN_VALUE(LowMemoryLength, PlmrAlignment)) ||
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(HighMemoryBase != ALIGN_VALUE(HighMemoryBase, PhmrAlignment)) ||
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(HighMemoryLength != ALIGN_VALUE(HighMemoryLength, PhmrAlignment))) {
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DEBUG ((DEBUG_ERROR, "PLMR/PHMR alignment issue\n"));
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return EFI_UNSUPPORTED;
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}
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if (LowMemoryBase == 0 && LowMemoryLength == 0) {
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LowMemoryBase = 0xFFFFFFFF;
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}
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if (HighMemoryBase == 0 && HighMemoryLength == 0) {
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HighMemoryBase = 0xFFFFFFFFFFFFFFFF;
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}
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MmioWrite32 (VtdUnitBaseAddress + R_PMEN_LOW_BASE_REG, LowMemoryBase);
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MmioWrite32 (VtdUnitBaseAddress + R_PMEN_LOW_LIMITE_REG, LowMemoryBase + LowMemoryLength - 1);
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MmioWrite64 (VtdUnitBaseAddress + R_PMEN_HIGH_BASE_REG, HighMemoryBase);
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MmioWrite64 (VtdUnitBaseAddress + R_PMEN_HIGH_LIMITE_REG, HighMemoryBase + HighMemoryLength - 1);
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return EFI_SUCCESS;
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}
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/**
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Set DMA protected region.
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@param EngineMask The mask of the VTd engine to be accessed.
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@param LowMemoryBase The protected low memory region base.
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@param LowMemoryLength The protected low memory region length.
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@param HighMemoryBase The protected high memory region base.
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@param HighMemoryLength The protected high memory region length.
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@retval EFI_SUCCESS The DMA protection is set.
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@retval EFI_UNSUPPORTED The DMA protection is not set.
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**/
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EFI_STATUS
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SetDmaProtectedRange (
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IN UINT64 EngineMask,
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IN UINT32 LowMemoryBase,
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IN UINT32 LowMemoryLength,
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IN UINT64 HighMemoryBase,
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IN UINT64 HighMemoryLength
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)
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{
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UINTN Index;
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EFI_STATUS Status;
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DEBUG ((DEBUG_INFO, "SetDmaProtectedRange(0x%lx) - [0x%x, 0x%x] [0x%lx, 0x%lx]\n", EngineMask, LowMemoryBase, LowMemoryLength, HighMemoryBase, HighMemoryLength));
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for (Index = 0; Index < mVTdInfo->VTdEngineCount; Index++) {
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if ((EngineMask & LShiftU64(1, Index)) == 0) {
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continue;
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}
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DisablePmr ((UINTN)mVTdInfo->VTdEngineAddress[Index]);
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Status = SetPmrRegion (
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(UINTN)mVTdInfo->VTdEngineAddress[Index],
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LowMemoryBase,
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LowMemoryLength,
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HighMemoryBase,
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HighMemoryLength
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);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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Status = EnablePmr ((UINTN)mVTdInfo->VTdEngineAddress[Index]);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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}
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return EFI_SUCCESS;
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}
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/**
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Diable DMA protection.
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@param EngineMask The mask of the VTd engine to be accessed.
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@retval DMA protection is disabled.
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**/
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EFI_STATUS
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DisableDmaProtection (
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IN UINT64 EngineMask
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)
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{
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UINTN Index;
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EFI_STATUS Status;
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DEBUG ((DEBUG_INFO, "DisableDmaProtection\n"));
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for (Index = 0; Index < mVTdInfo->VTdEngineCount; Index++) {
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if ((EngineMask & LShiftU64(1, Index)) == 0) {
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continue;
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}
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Status = DisablePmr ((UINTN)mVTdInfo->VTdEngineAddress[Index]);
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if (EFI_ERROR(Status)) {
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return Status;
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}
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}
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return EFI_SUCCESS;
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}
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