878a92a887
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=2507 Adding OpensslLibX64.inf and modifying process_files.pl to process this file and generate the necessary assembly files. Adding OpensslLibX64Gcc.inf to allow building with GCC toolchain. ApiHooks.c contains a stub function for a Windows API call. uefi-asm.conf contains the limited assembly configurations for OpenSSL. Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jian J Wang <jian.j.wang@intel.com> Cc: Xiaoyu Lu <xiaoyux.lu@intel.com> Cc: Mike Kinney <michael.d.kinney@intel.com> Cc: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Christopher Zurcher <christopher.zurcher@microsoft.com> Reviewed-by: Jiewen Yao <Jiewen.yao@intel.com>
31 lines
1.3 KiB
Perl
31 lines
1.3 KiB
Perl
## -*- mode: perl; -*-
|
|
# UEFI assembly openssl configuration targets.
|
|
#
|
|
# Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>
|
|
#
|
|
# SPDX-License-Identifier: BSD-2-Clause-Patent
|
|
#
|
|
##
|
|
|
|
my %targets = (
|
|
#### UEFI
|
|
"UEFI-x86_64" => {
|
|
perlasm_scheme => "nasm",
|
|
# inherit_from => [ "UEFI", asm("x86_64_asm") ],
|
|
inherit_from => [ "UEFI" ],
|
|
cpuid_asm_src => "x86_64cpuid.s",
|
|
aes_asm_src => "aes_core.c aes_cbc.c vpaes-x86_64.s aesni-x86_64.s aesni-sha1-x86_64.s aesni-sha256-x86_64.s aesni-mb-x86_64.s",
|
|
sha1_asm_src => "sha1-x86_64.s sha256-x86_64.s sha512-x86_64.s sha1-mb-x86_64.s sha256-mb-x86_64.s",
|
|
modes_asm_src => "ghash-x86_64.s aesni-gcm-x86_64.s",
|
|
},
|
|
"UEFI-x86_64-GCC" => {
|
|
perlasm_scheme => "elf",
|
|
# inherit_from => [ "UEFI", asm("x86_64_asm") ],
|
|
inherit_from => [ "UEFI" ],
|
|
cpuid_asm_src => "x86_64cpuid.s",
|
|
aes_asm_src => "aes_core.c aes_cbc.c vpaes-x86_64.s aesni-x86_64.s aesni-sha1-x86_64.s aesni-sha256-x86_64.s aesni-mb-x86_64.s",
|
|
sha1_asm_src => "sha1-x86_64.s sha256-x86_64.s sha512-x86_64.s sha1-mb-x86_64.s sha256-mb-x86_64.s",
|
|
modes_asm_src => "ghash-x86_64.s aesni-gcm-x86_64.s",
|
|
},
|
|
);
|