b303605e1b
Changes for V4 ============== 1) Move delete of QuarkSocPkg\QuarkNorthCluster\Binary\QuarkMicrocode from QuarkPlatformPkg commit to QuarkSocPkg commit 2) Fix incorrect license header in PlatformSecLibModStrs.uni Changes for V3 ============== 1) Set PcdResetOnMemoryTypeInformationChange FALSE in QuarkMin.dsc This is required because QuarkMin.dsc uses the emulated variable driver that does not preserve any non-volatile UEFI variables across reset. If the condition is met where the memory type information variable needs to be updated, then the system will reset every time the UEFI Shell is run. By setting this PCD to FALSE, then reset action is disabled. 2) Move one binary file to QuarkSocBinPkg 3) Change RMU.bin FILE statements to INF statement in DSC FD region to be compatible with PACKAGES_PATH search for QuarkSocBinPkg Changes for V2 ============== 1) Use new generic PCI serial driver PciSioSerialDxe in MdeModulePkg 2) Configure PcdPciSerialParameters for PCI serial driver for Quark 3) Use new MtrrLib API to reduce time to set MTRRs for all DRAM 4) Convert all UNI files to utf-8 5) Replace tabs with spaces and remove trailing spaces 6) Add License.txt Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Kinney <michael.d.kinney@intel.com> Acked-by: Jordan Justen <jordan.l.justen@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@19287 6f19259b-4bc3-4df7-8a09-765794883524
121 lines
3.0 KiB
C
121 lines
3.0 KiB
C
/** @file
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Platform Pcie Helper Lib.
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Copyright (c) 2013 Intel Corporation.
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "CommonHeader.h"
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//
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// Routines local to this source module.
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//
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VOID
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LegacyGpioSetLevel (
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IN CONST UINT32 LevelRegOffset,
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IN CONST UINT32 GpioNum,
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IN CONST BOOLEAN HighLevel
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)
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{
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UINT32 RegValue;
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UINT32 GpioBaseAddress;
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UINT32 GpioNumMask;
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GpioBaseAddress = LpcPciCfg32 (R_QNC_LPC_GBA_BASE) & B_QNC_LPC_GPA_BASE_MASK;
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ASSERT (GpioBaseAddress > 0);
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RegValue = IoRead32 (GpioBaseAddress + LevelRegOffset);
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GpioNumMask = (1 << GpioNum);
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if (HighLevel) {
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RegValue |= (GpioNumMask);
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} else {
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RegValue &= ~(GpioNumMask);
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}
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IoWrite32 (GpioBaseAddress + R_QNC_GPIO_RGLVL_RESUME_WELL, RegValue);
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}
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//
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// Routines exported by this component.
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//
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/**
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Platform assert PCI express PERST# signal.
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@param PlatformType See EFI_PLATFORM_TYPE enum definitions.
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**/
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VOID
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EFIAPI
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PlatformPERSTAssert (
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IN CONST EFI_PLATFORM_TYPE PlatformType
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)
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{
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if (PlatformType == GalileoGen2) {
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LegacyGpioSetLevel (R_QNC_GPIO_RGLVL_RESUME_WELL, GALILEO_GEN2_PCIEXP_PERST_RESUMEWELL_GPIO, FALSE);
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} else {
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LegacyGpioSetLevel (R_QNC_GPIO_RGLVL_RESUME_WELL, PCIEXP_PERST_RESUMEWELL_GPIO, FALSE);
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}
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}
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/**
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Platform de assert PCI express PERST# signal.
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@param PlatformType See EFI_PLATFORM_TYPE enum definitions.
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**/
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VOID
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EFIAPI
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PlatformPERSTDeAssert (
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IN CONST EFI_PLATFORM_TYPE PlatformType
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)
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{
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if (PlatformType == GalileoGen2) {
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LegacyGpioSetLevel (R_QNC_GPIO_RGLVL_RESUME_WELL, GALILEO_GEN2_PCIEXP_PERST_RESUMEWELL_GPIO, TRUE);
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} else {
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LegacyGpioSetLevel (R_QNC_GPIO_RGLVL_RESUME_WELL, PCIEXP_PERST_RESUMEWELL_GPIO, TRUE);
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}
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}
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/** Early initialisation of the PCIe controller.
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@param PlatformType See EFI_PLATFORM_TYPE enum definitions.
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@retval EFI_SUCCESS Operation success.
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**/
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EFI_STATUS
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EFIAPI
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PlatformPciExpressEarlyInit (
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IN CONST EFI_PLATFORM_TYPE PlatformType
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)
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{
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//
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// Release and wait for PCI controller to come out of reset.
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//
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SocUnitReleasePcieControllerPreWaitPllLock (PlatformType);
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MicroSecondDelay (PCIEXP_DELAY_US_WAIT_PLL_LOCK);
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SocUnitReleasePcieControllerPostPllLock (PlatformType);
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//
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// Early PCIe initialisation
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//
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SocUnitEarlyInitialisation ();
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//
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// Do North cluster early PCIe init.
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//
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PciExpressEarlyInit ();
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return EFI_SUCCESS;
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}
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