Fix SMBIOSVIEW decode of the HeaderLog fields of the PCIe AER structure . The PCIe 2.1 Base Specification, section 7.10, lists this as 16 bytes, or 4 DWORDs. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Samer El-Haj-Mahmoud <elhaj@hpe.com> Reviewed-by: Jaben Carsey <jaben.carsey@intel.com>