https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Chasel Chiu <chasel.chiu@intel.com>
		
			
				
	
	
		
			131 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			NASM
		
	
	
	
	
	
			
		
		
	
	
			131 lines
		
	
	
		
			2.3 KiB
		
	
	
	
		
			NASM
		
	
	
	
	
	
| ;------------------------------------------------------------------------------
 | |
| ;
 | |
| ; Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>
 | |
| ; SPDX-License-Identifier: BSD-2-Clause-Patent
 | |
| ;
 | |
| ; Module Name:
 | |
| ;
 | |
| ;  PeiCoreEntry.nasm
 | |
| ;
 | |
| ; Abstract:
 | |
| ;
 | |
| ;   Find and call SecStartup
 | |
| ;
 | |
| ;------------------------------------------------------------------------------
 | |
| 
 | |
| SECTION .text
 | |
| 
 | |
| extern ASM_PFX(SecStartup)
 | |
| extern ASM_PFX(PlatformInit)
 | |
| 
 | |
| global ASM_PFX(CallPeiCoreEntryPoint)
 | |
| ASM_PFX(CallPeiCoreEntryPoint):
 | |
|   ;
 | |
|   ; Obtain the hob list pointer
 | |
|   ;
 | |
|   mov     eax, [esp+4]
 | |
|   ;
 | |
|   ; Obtain the stack information
 | |
|   ;   ECX: start of range
 | |
|   ;   EDX: end of range
 | |
|   ;
 | |
|   mov     ecx, [esp+8]
 | |
|   mov     edx, [esp+0xC]
 | |
| 
 | |
|   ;
 | |
|   ; Platform init
 | |
|   ;
 | |
|   pushad
 | |
|   push edx
 | |
|   push ecx
 | |
|   push eax
 | |
|   call ASM_PFX(PlatformInit)
 | |
|   pop  eax
 | |
|   pop  eax
 | |
|   pop  eax
 | |
|   popad
 | |
| 
 | |
|   ;
 | |
|   ; Set stack top pointer
 | |
|   ;
 | |
|   mov     esp, edx
 | |
| 
 | |
|   ;
 | |
|   ; Push the hob list pointer
 | |
|   ;
 | |
|   push    eax
 | |
| 
 | |
|   ;
 | |
|   ; Save the value
 | |
|   ;   ECX: start of range
 | |
|   ;   EDX: end of range
 | |
|   ;
 | |
|   mov     ebp, esp
 | |
|   push    ecx
 | |
|   push    edx
 | |
| 
 | |
|   ;
 | |
|   ; Push processor count to stack first, then BIST status (AP then BSP)
 | |
|   ;
 | |
|   mov     eax, 1
 | |
|   cpuid
 | |
|   shr     ebx, 16
 | |
|   and     ebx, 0xFF
 | |
|   cmp     bl, 1
 | |
|   jae     PushProcessorCount
 | |
| 
 | |
|   ;
 | |
|   ; Some processors report 0 logical processors.  Effectively 0 = 1.
 | |
|   ; So we fix up the processor count
 | |
|   ;
 | |
|   inc     ebx
 | |
| 
 | |
| PushProcessorCount:
 | |
|   push    ebx
 | |
| 
 | |
|   ;
 | |
|   ; We need to implement a long-term solution for BIST capture.  For now, we just copy BSP BIST
 | |
|   ; for all processor threads
 | |
|   ;
 | |
|   xor     ecx, ecx
 | |
|   mov     cl, bl
 | |
| PushBist:
 | |
|   movd    eax, mm0
 | |
|   push    eax
 | |
|   loop    PushBist
 | |
| 
 | |
|   ; Save Time-Stamp Counter
 | |
|   movd eax, mm5
 | |
|   push eax
 | |
| 
 | |
|   movd eax, mm6
 | |
|   push eax
 | |
| 
 | |
|   ;
 | |
|   ; Pass entry point of the PEI core
 | |
|   ;
 | |
|   mov     edi, 0xFFFFFFE0
 | |
|   push    DWORD [edi]
 | |
| 
 | |
|   ;
 | |
|   ; Pass BFV into the PEI Core
 | |
|   ;
 | |
|   mov     edi, 0xFFFFFFFC
 | |
|   push    DWORD [edi]
 | |
| 
 | |
|   ;
 | |
|   ; Pass stack size into the PEI Core
 | |
|   ;
 | |
|   mov     ecx, [ebp - 4]
 | |
|   mov     edx, [ebp - 8]
 | |
|   push    ecx       ; RamBase
 | |
| 
 | |
|   sub     edx, ecx
 | |
|   push    edx       ; RamSize
 | |
| 
 | |
|   ;
 | |
|   ; Pass Control into the PEI Core
 | |
|   ;
 | |
|   call ASM_PFX(SecStartup)
 | |
| 
 |