053e878bfb
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3737 Apply uncrustify changes to .c/.h files in the UefiCpuPkg package Cc: Andrew Fish <afish@apple.com> Cc: Leif Lindholm <leif@nuviainc.com> Cc: Michael D Kinney <michael.d.kinney@intel.com> Signed-off-by: Michael Kubacki <michael.kubacki@microsoft.com> Reviewed-by: Ray Ni <ray.ni@intel.com>
1018 lines
31 KiB
C
1018 lines
31 KiB
C
/** @file
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Unit tests of the MtrrLib instance of the MtrrLib class
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Copyright (c) 2018 - 2020, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#include "MtrrLibUnitTest.h"
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MTRR_MEMORY_CACHE_TYPE mMemoryCacheTypes[] = {
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CacheUncacheable, CacheWriteCombining, CacheWriteThrough, CacheWriteProtected, CacheWriteBack
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};
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UINT64 mFixedMtrrsValue[MTRR_NUMBER_OF_FIXED_MTRR];
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MSR_IA32_MTRR_PHYSBASE_REGISTER mVariableMtrrsPhysBase[MTRR_NUMBER_OF_VARIABLE_MTRR];
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MSR_IA32_MTRR_PHYSMASK_REGISTER mVariableMtrrsPhysMask[MTRR_NUMBER_OF_VARIABLE_MTRR];
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MSR_IA32_MTRR_DEF_TYPE_REGISTER mDefTypeMsr;
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MSR_IA32_MTRRCAP_REGISTER mMtrrCapMsr;
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CPUID_VERSION_INFO_EDX mCpuidVersionInfoEdx;
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CPUID_VIR_PHY_ADDRESS_SIZE_EAX mCpuidVirPhyAddressSizeEax;
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BOOLEAN mRandomInput;
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UINTN mNumberIndex = 0;
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extern UINTN mNumbers[];
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extern UINTN mNumberCount;
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/**
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Return a random number between 0 and RAND_MAX.
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If mRandomInput is TRUE, the routine directly calls rand().
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Otherwise, the routine returns the pre-generated numbers.
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@return a number between 0 and RAND_MAX.
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**/
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UINTN
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Rand (
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VOID
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)
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{
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if (mRandomInput) {
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return rand ();
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} else {
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DEBUG ((DEBUG_INFO, "random: %d\n", mNumberIndex));
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return mNumbers[mNumberIndex++ % (mNumberCount - 1)];
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}
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}
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CHAR8 mContentTemplate[] = {
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"/** @file\n"
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" Pre-generated random number used by MtrrLib test.\n"
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"\n"
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" Copyright (c) 2020, Intel Corporation. All rights reserved.<BR>\n"
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" SPDX-License-Identifier: BSD-2-Clause-Patent\n"
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"**/\n"
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"UINTN mNumberCount = %d;\n"
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"UINTN mNumbers[] = {"
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};
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/**
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Generate Count random numbers in FilePath.
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@param FilePath The file path to put the generated random numbers.
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@param Count Count of random numbers.
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**/
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VOID
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GenerateRandomNumbers (
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CHAR8 *FilePath,
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UINTN Count
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)
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{
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FILE *File;
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UINTN Index;
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File = fopen (FilePath, "w");
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fprintf (File, mContentTemplate, Count);
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for (Index = 0; Index < Count; Index++) {
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if (Index % 10 == 0) {
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fprintf (File, "\n ");
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}
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fprintf (File, " %d,", rand ());
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}
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fprintf (File, "\n};\n");
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fclose (File);
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}
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/**
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Retrieves CPUID information.
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Executes the CPUID instruction with EAX set to the value specified by Index.
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This function always returns Index.
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If Eax is not NULL, then the value of EAX after CPUID is returned in Eax.
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If Ebx is not NULL, then the value of EBX after CPUID is returned in Ebx.
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If Ecx is not NULL, then the value of ECX after CPUID is returned in Ecx.
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If Edx is not NULL, then the value of EDX after CPUID is returned in Edx.
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This function is only available on IA-32 and x64.
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@param Index The 32-bit value to load into EAX prior to invoking the CPUID
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instruction.
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@param Eax The pointer to the 32-bit EAX value returned by the CPUID
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instruction. This is an optional parameter that may be NULL.
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@param Ebx The pointer to the 32-bit EBX value returned by the CPUID
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instruction. This is an optional parameter that may be NULL.
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@param Ecx The pointer to the 32-bit ECX value returned by the CPUID
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instruction. This is an optional parameter that may be NULL.
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@param Edx The pointer to the 32-bit EDX value returned by the CPUID
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instruction. This is an optional parameter that may be NULL.
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@return Index.
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**/
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UINT32
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EFIAPI
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UnitTestMtrrLibAsmCpuid (
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IN UINT32 Index,
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OUT UINT32 *Eax OPTIONAL,
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OUT UINT32 *Ebx OPTIONAL,
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OUT UINT32 *Ecx OPTIONAL,
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OUT UINT32 *Edx OPTIONAL
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)
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{
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switch (Index) {
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case CPUID_VERSION_INFO:
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if (Edx != NULL) {
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*Edx = mCpuidVersionInfoEdx.Uint32;
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}
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return Index;
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break;
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case CPUID_EXTENDED_FUNCTION:
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if (Eax != NULL) {
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*Eax = CPUID_VIR_PHY_ADDRESS_SIZE;
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}
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return Index;
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break;
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case CPUID_VIR_PHY_ADDRESS_SIZE:
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if (Eax != NULL) {
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*Eax = mCpuidVirPhyAddressSizeEax.Uint32;
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}
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return Index;
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break;
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}
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//
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// Should never fall through to here
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//
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ASSERT (FALSE);
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return Index;
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}
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/**
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Returns a 64-bit Machine Specific Register(MSR).
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Reads and returns the 64-bit MSR specified by Index. No parameter checking is
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performed on Index, and some Index values may cause CPU exceptions. The
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caller must either guarantee that Index is valid, or the caller must set up
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exception handlers to catch the exceptions. This function is only available
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on IA-32 and x64.
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@param MsrIndex The 32-bit MSR index to read.
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@return The value of the MSR identified by MsrIndex.
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**/
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UINT64
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EFIAPI
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UnitTestMtrrLibAsmReadMsr64 (
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IN UINT32 MsrIndex
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)
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{
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UINT32 Index;
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for (Index = 0; Index < ARRAY_SIZE (mFixedMtrrsValue); Index++) {
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if (MsrIndex == mFixedMtrrsIndex[Index]) {
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return mFixedMtrrsValue[Index];
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}
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}
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if ((MsrIndex >= MSR_IA32_MTRR_PHYSBASE0) &&
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(MsrIndex <= MSR_IA32_MTRR_PHYSMASK0 + (MTRR_NUMBER_OF_VARIABLE_MTRR << 1)))
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{
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if (MsrIndex % 2 == 0) {
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Index = (MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1;
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return mVariableMtrrsPhysBase[Index].Uint64;
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} else {
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Index = (MsrIndex - MSR_IA32_MTRR_PHYSMASK0) >> 1;
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return mVariableMtrrsPhysMask[Index].Uint64;
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}
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}
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if (MsrIndex == MSR_IA32_MTRR_DEF_TYPE) {
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return mDefTypeMsr.Uint64;
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}
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if (MsrIndex == MSR_IA32_MTRRCAP) {
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return mMtrrCapMsr.Uint64;
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}
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//
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// Should never fall through to here
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//
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ASSERT (FALSE);
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return 0;
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}
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/**
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Writes a 64-bit value to a Machine Specific Register(MSR), and returns the
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value.
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Writes the 64-bit value specified by Value to the MSR specified by Index. The
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64-bit value written to the MSR is returned. No parameter checking is
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performed on Index or Value, and some of these may cause CPU exceptions. The
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caller must either guarantee that Index and Value are valid, or the caller
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must establish proper exception handlers. This function is only available on
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IA-32 and x64.
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@param MsrIndex The 32-bit MSR index to write.
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@param Value The 64-bit value to write to the MSR.
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@return Value
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**/
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UINT64
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EFIAPI
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UnitTestMtrrLibAsmWriteMsr64 (
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IN UINT32 MsrIndex,
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IN UINT64 Value
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)
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{
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UINT32 Index;
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for (Index = 0; Index < ARRAY_SIZE (mFixedMtrrsValue); Index++) {
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if (MsrIndex == mFixedMtrrsIndex[Index]) {
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mFixedMtrrsValue[Index] = Value;
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return Value;
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}
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}
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if ((MsrIndex >= MSR_IA32_MTRR_PHYSBASE0) &&
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(MsrIndex <= MSR_IA32_MTRR_PHYSMASK0 + (MTRR_NUMBER_OF_VARIABLE_MTRR << 1)))
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{
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if (MsrIndex % 2 == 0) {
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Index = (MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1;
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mVariableMtrrsPhysBase[Index].Uint64 = Value;
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return Value;
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} else {
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Index = (MsrIndex - MSR_IA32_MTRR_PHYSMASK0) >> 1;
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mVariableMtrrsPhysMask[Index].Uint64 = Value;
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return Value;
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}
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}
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if (MsrIndex == MSR_IA32_MTRR_DEF_TYPE) {
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mDefTypeMsr.Uint64 = Value;
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return Value;
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}
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if (MsrIndex == MSR_IA32_MTRRCAP) {
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mMtrrCapMsr.Uint64 = Value;
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return Value;
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}
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//
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// Should never fall through to here
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//
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ASSERT (FALSE);
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return 0;
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}
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/**
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Initialize the MTRR registers.
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@param SystemParameter System parameter that controls the MTRR registers initialization.
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**/
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UNIT_TEST_STATUS
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EFIAPI
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InitializeMtrrRegs (
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IN MTRR_LIB_SYSTEM_PARAMETER *SystemParameter
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)
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{
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UINT32 Index;
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SetMem (mFixedMtrrsValue, sizeof (mFixedMtrrsValue), SystemParameter->DefaultCacheType);
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for (Index = 0; Index < ARRAY_SIZE (mVariableMtrrsPhysBase); Index++) {
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mVariableMtrrsPhysBase[Index].Uint64 = 0;
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mVariableMtrrsPhysBase[Index].Bits.Type = SystemParameter->DefaultCacheType;
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mVariableMtrrsPhysBase[Index].Bits.Reserved1 = 0;
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mVariableMtrrsPhysMask[Index].Uint64 = 0;
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mVariableMtrrsPhysMask[Index].Bits.V = 0;
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mVariableMtrrsPhysMask[Index].Bits.Reserved1 = 0;
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}
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mDefTypeMsr.Bits.E = 1;
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mDefTypeMsr.Bits.FE = 1;
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mDefTypeMsr.Bits.Type = SystemParameter->DefaultCacheType;
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mDefTypeMsr.Bits.Reserved1 = 0;
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mDefTypeMsr.Bits.Reserved2 = 0;
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mDefTypeMsr.Bits.Reserved3 = 0;
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mMtrrCapMsr.Bits.SMRR = 0;
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mMtrrCapMsr.Bits.WC = 0;
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mMtrrCapMsr.Bits.VCNT = SystemParameter->VariableMtrrCount;
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mMtrrCapMsr.Bits.FIX = SystemParameter->FixedMtrrSupported;
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mMtrrCapMsr.Bits.Reserved1 = 0;
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mMtrrCapMsr.Bits.Reserved2 = 0;
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mMtrrCapMsr.Bits.Reserved3 = 0;
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mCpuidVersionInfoEdx.Bits.MTRR = SystemParameter->MtrrSupported;
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mCpuidVirPhyAddressSizeEax.Bits.PhysicalAddressBits = SystemParameter->PhysicalAddressBits;
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//
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// Hook BaseLib functions used by MtrrLib that require some emulation.
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//
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gUnitTestHostBaseLib.X86->AsmCpuid = UnitTestMtrrLibAsmCpuid;
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gUnitTestHostBaseLib.X86->AsmReadMsr64 = UnitTestMtrrLibAsmReadMsr64;
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gUnitTestHostBaseLib.X86->AsmWriteMsr64 = UnitTestMtrrLibAsmWriteMsr64;
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return UNIT_TEST_PASSED;
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}
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/**
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Initialize the MTRR registers.
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@param Context System parameter that controls the MTRR registers initialization.
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**/
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UNIT_TEST_STATUS
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EFIAPI
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InitializeSystem (
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IN UNIT_TEST_CONTEXT Context
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)
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{
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return InitializeMtrrRegs ((MTRR_LIB_SYSTEM_PARAMETER *)Context);
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}
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/**
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Collect the test result.
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@param DefaultType Default memory type.
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@param PhysicalAddressBits Physical address bits.
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@param VariableMtrrCount Count of variable MTRRs.
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@param Mtrrs MTRR settings to collect from.
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@param Ranges Return the memory ranges.
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@param RangeCount Return the count of memory ranges.
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@param MtrrCount Return the count of variable MTRRs being used.
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**/
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VOID
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CollectTestResult (
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IN MTRR_MEMORY_CACHE_TYPE DefaultType,
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IN UINT32 PhysicalAddressBits,
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IN UINT32 VariableMtrrCount,
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IN MTRR_SETTINGS *Mtrrs,
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OUT MTRR_MEMORY_RANGE *Ranges,
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IN OUT UINTN *RangeCount,
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OUT UINT32 *MtrrCount
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)
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{
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UINTN Index;
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UINT64 MtrrValidBitsMask;
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UINT64 MtrrValidAddressMask;
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MTRR_MEMORY_RANGE RawMemoryRanges[ARRAY_SIZE (Mtrrs->Variables.Mtrr)];
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ASSERT (Mtrrs != NULL);
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ASSERT (VariableMtrrCount <= ARRAY_SIZE (Mtrrs->Variables.Mtrr));
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MtrrValidBitsMask = (1ull << PhysicalAddressBits) - 1;
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MtrrValidAddressMask = MtrrValidBitsMask & ~0xFFFull;
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*MtrrCount = 0;
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for (Index = 0; Index < VariableMtrrCount; Index++) {
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if (((MSR_IA32_MTRR_PHYSMASK_REGISTER *)&Mtrrs->Variables.Mtrr[Index].Mask)->Bits.V == 1) {
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RawMemoryRanges[*MtrrCount].BaseAddress = Mtrrs->Variables.Mtrr[Index].Base & MtrrValidAddressMask;
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RawMemoryRanges[*MtrrCount].Type =
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((MSR_IA32_MTRR_PHYSBASE_REGISTER *)&Mtrrs->Variables.Mtrr[Index].Base)->Bits.Type;
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RawMemoryRanges[*MtrrCount].Length =
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((~(Mtrrs->Variables.Mtrr[Index].Mask & MtrrValidAddressMask)) & MtrrValidBitsMask) + 1;
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(*MtrrCount)++;
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}
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}
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GetEffectiveMemoryRanges (DefaultType, PhysicalAddressBits, RawMemoryRanges, *MtrrCount, Ranges, RangeCount);
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}
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/**
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Return a 32bit random number.
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@param Start Start of the random number range.
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@param Limit Limit of the random number range.
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@return 32bit random number
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**/
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UINT32
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Random32 (
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UINT32 Start,
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UINT32 Limit
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)
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{
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return (UINT32)(((double)Rand () / RAND_MAX) * (Limit - Start)) + Start;
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}
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/**
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Return a 64bit random number.
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@param Start Start of the random number range.
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@param Limit Limit of the random number range.
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@return 64bit random number
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**/
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UINT64
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Random64 (
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UINT64 Start,
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UINT64 Limit
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)
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{
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return (UINT64)(((double)Rand () / RAND_MAX) * (Limit - Start)) + Start;
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}
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/**
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Generate random MTRR BASE/MASK for a specified type.
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@param PhysicalAddressBits Physical address bits.
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@param CacheType Cache type.
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@param MtrrPair Return the random MTRR.
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@param MtrrMemoryRange Return the random memory range.
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**/
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VOID
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GenerateRandomMtrrPair (
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IN UINT32 PhysicalAddressBits,
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IN MTRR_MEMORY_CACHE_TYPE CacheType,
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OUT MTRR_VARIABLE_SETTING *MtrrPair OPTIONAL,
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OUT MTRR_MEMORY_RANGE *MtrrMemoryRange OPTIONAL
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)
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{
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MSR_IA32_MTRR_PHYSBASE_REGISTER PhysBase;
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MSR_IA32_MTRR_PHYSMASK_REGISTER PhysMask;
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UINT32 SizeShift;
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UINT32 BaseShift;
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UINT64 RandomBoundary;
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UINT64 MaxPhysicalAddress;
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UINT64 RangeSize;
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UINT64 RangeBase;
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UINT64 PhysBasePhyMaskValidBitsMask;
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MaxPhysicalAddress = 1ull << PhysicalAddressBits;
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do {
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SizeShift = Random32 (12, PhysicalAddressBits - 1);
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RangeSize = 1ull << SizeShift;
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BaseShift = Random32 (SizeShift, PhysicalAddressBits - 1);
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RandomBoundary = Random64 (0, 1ull << (PhysicalAddressBits - BaseShift));
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RangeBase = RandomBoundary << BaseShift;
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} while (RangeBase < SIZE_1MB || RangeBase > MaxPhysicalAddress - 1);
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PhysBasePhyMaskValidBitsMask = (MaxPhysicalAddress - 1) & 0xfffffffffffff000ULL;
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PhysBase.Uint64 = 0;
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PhysBase.Bits.Type = CacheType;
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PhysBase.Uint64 |= RangeBase & PhysBasePhyMaskValidBitsMask;
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PhysMask.Uint64 = 0;
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PhysMask.Bits.V = 1;
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PhysMask.Uint64 |= ((~RangeSize) + 1) & PhysBasePhyMaskValidBitsMask;
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if (MtrrPair != NULL) {
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MtrrPair->Base = PhysBase.Uint64;
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MtrrPair->Mask = PhysMask.Uint64;
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}
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if (MtrrMemoryRange != NULL) {
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MtrrMemoryRange->BaseAddress = RangeBase;
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MtrrMemoryRange->Length = RangeSize;
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MtrrMemoryRange->Type = CacheType;
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}
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}
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/**
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Check whether the Range overlaps with any one in Ranges.
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@param Range The memory range to check.
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@param Ranges The memory ranges.
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@param Count Count of memory ranges.
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@return TRUE when overlap exists.
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**/
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BOOLEAN
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RangesOverlap (
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IN MTRR_MEMORY_RANGE *Range,
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IN MTRR_MEMORY_RANGE *Ranges,
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IN UINTN Count
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)
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{
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while (Count-- != 0) {
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//
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// Two ranges overlap when:
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// 1. range#2.base is in the middle of range#1
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// 2. range#1.base is in the middle of range#2
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//
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if ( ((Range->BaseAddress <= Ranges[Count].BaseAddress) && (Ranges[Count].BaseAddress < Range->BaseAddress + Range->Length))
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|| ((Ranges[Count].BaseAddress <= Range->BaseAddress) && (Range->BaseAddress < Ranges[Count].BaseAddress + Ranges[Count].Length)))
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{
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return TRUE;
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}
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}
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return FALSE;
|
|
}
|
|
|
|
/**
|
|
Generate random MTRRs.
|
|
|
|
@param PhysicalAddressBits Physical address bits.
|
|
@param RawMemoryRanges Return the randomly generated MTRRs.
|
|
@param UcCount Count of Uncacheable MTRRs.
|
|
@param WtCount Count of Write Through MTRRs.
|
|
@param WbCount Count of Write Back MTRRs.
|
|
@param WpCount Count of Write Protected MTRRs.
|
|
@param WcCount Count of Write Combine MTRRs.
|
|
**/
|
|
VOID
|
|
GenerateValidAndConfigurableMtrrPairs (
|
|
IN UINT32 PhysicalAddressBits,
|
|
IN OUT MTRR_MEMORY_RANGE *RawMemoryRanges,
|
|
IN UINT32 UcCount,
|
|
IN UINT32 WtCount,
|
|
IN UINT32 WbCount,
|
|
IN UINT32 WpCount,
|
|
IN UINT32 WcCount
|
|
)
|
|
{
|
|
UINT32 Index;
|
|
|
|
//
|
|
// 1. Generate UC, WT, WB in order.
|
|
//
|
|
for (Index = 0; Index < UcCount; Index++) {
|
|
GenerateRandomMtrrPair (PhysicalAddressBits, CacheUncacheable, NULL, &RawMemoryRanges[Index]);
|
|
}
|
|
|
|
for (Index = UcCount; Index < UcCount + WtCount; Index++) {
|
|
GenerateRandomMtrrPair (PhysicalAddressBits, CacheWriteThrough, NULL, &RawMemoryRanges[Index]);
|
|
}
|
|
|
|
for (Index = UcCount + WtCount; Index < UcCount + WtCount + WbCount; Index++) {
|
|
GenerateRandomMtrrPair (PhysicalAddressBits, CacheWriteBack, NULL, &RawMemoryRanges[Index]);
|
|
}
|
|
|
|
//
|
|
// 2. Generate WP MTRR and DO NOT overlap with WT, WB.
|
|
//
|
|
for (Index = UcCount + WtCount + WbCount; Index < UcCount + WtCount + WbCount + WpCount; Index++) {
|
|
GenerateRandomMtrrPair (PhysicalAddressBits, CacheWriteProtected, NULL, &RawMemoryRanges[Index]);
|
|
while (RangesOverlap (&RawMemoryRanges[Index], &RawMemoryRanges[UcCount], WtCount + WbCount)) {
|
|
GenerateRandomMtrrPair (PhysicalAddressBits, CacheWriteProtected, NULL, &RawMemoryRanges[Index]);
|
|
}
|
|
}
|
|
|
|
//
|
|
// 3. Generate WC MTRR and DO NOT overlap with WT, WB, WP.
|
|
//
|
|
for (Index = UcCount + WtCount + WbCount + WpCount; Index < UcCount + WtCount + WbCount + WpCount + WcCount; Index++) {
|
|
GenerateRandomMtrrPair (PhysicalAddressBits, CacheWriteCombining, NULL, &RawMemoryRanges[Index]);
|
|
while (RangesOverlap (&RawMemoryRanges[Index], &RawMemoryRanges[UcCount], WtCount + WbCount + WpCount)) {
|
|
GenerateRandomMtrrPair (PhysicalAddressBits, CacheWriteCombining, NULL, &RawMemoryRanges[Index]);
|
|
}
|
|
}
|
|
}
|
|
|
|
/**
|
|
Return a random memory cache type.
|
|
**/
|
|
MTRR_MEMORY_CACHE_TYPE
|
|
GenerateRandomCacheType (
|
|
VOID
|
|
)
|
|
{
|
|
return mMemoryCacheTypes[Random32 (0, ARRAY_SIZE (mMemoryCacheTypes) - 1)];
|
|
}
|
|
|
|
/**
|
|
Compare function used by qsort().
|
|
**/
|
|
|
|
/**
|
|
Compare function used by qsort().
|
|
|
|
@param Left Left operand to compare.
|
|
@param Right Right operand to compare.
|
|
|
|
@retval 0 Left == Right
|
|
@retval -1 Left < Right
|
|
@retval 1 Left > Right
|
|
**/
|
|
INT32
|
|
CompareFuncUint64 (
|
|
CONST VOID *Left,
|
|
CONST VOID *Right
|
|
)
|
|
{
|
|
INT64 Delta;
|
|
|
|
Delta = (*(UINT64 *)Left - *(UINT64 *)Right);
|
|
if (Delta > 0) {
|
|
return 1;
|
|
} else if (Delta == 0) {
|
|
return 0;
|
|
} else {
|
|
return -1;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Determin the memory cache type for the Range.
|
|
|
|
@param DefaultType Default cache type.
|
|
@param Range The memory range to determin the cache type.
|
|
@param Ranges The entire memory ranges.
|
|
@param RangeCount Count of the entire memory ranges.
|
|
**/
|
|
VOID
|
|
DetermineMemoryCacheType (
|
|
IN MTRR_MEMORY_CACHE_TYPE DefaultType,
|
|
IN OUT MTRR_MEMORY_RANGE *Range,
|
|
IN MTRR_MEMORY_RANGE *Ranges,
|
|
IN UINT32 RangeCount
|
|
)
|
|
{
|
|
UINT32 Index;
|
|
|
|
Range->Type = CacheInvalid;
|
|
for (Index = 0; Index < RangeCount; Index++) {
|
|
if (RangesOverlap (Range, &Ranges[Index], 1)) {
|
|
if (Ranges[Index].Type < Range->Type) {
|
|
Range->Type = Ranges[Index].Type;
|
|
}
|
|
}
|
|
}
|
|
|
|
if (Range->Type == CacheInvalid) {
|
|
Range->Type = DefaultType;
|
|
}
|
|
}
|
|
|
|
/**
|
|
Get the index of the element that does NOT equals to Array[Index].
|
|
|
|
@param Index Current element.
|
|
@param Array Array to scan.
|
|
@param Count Count of the array.
|
|
|
|
@return Next element that doesn't equal to current one.
|
|
**/
|
|
UINT32
|
|
GetNextDifferentElementInSortedArray (
|
|
IN UINT32 Index,
|
|
IN UINT64 *Array,
|
|
IN UINT32 Count
|
|
)
|
|
{
|
|
UINT64 CurrentElement;
|
|
|
|
CurrentElement = Array[Index];
|
|
while (CurrentElement == Array[Index] && Index < Count) {
|
|
Index++;
|
|
}
|
|
|
|
return Index;
|
|
}
|
|
|
|
/**
|
|
Remove the duplicates from the array.
|
|
|
|
@param Array The array to operate on.
|
|
@param Count Count of the array.
|
|
**/
|
|
VOID
|
|
RemoveDuplicatesInSortedArray (
|
|
IN OUT UINT64 *Array,
|
|
IN OUT UINT32 *Count
|
|
)
|
|
{
|
|
UINT32 Index;
|
|
UINT32 NewCount;
|
|
|
|
Index = 0;
|
|
NewCount = 0;
|
|
while (Index < *Count) {
|
|
Array[NewCount] = Array[Index];
|
|
NewCount++;
|
|
Index = GetNextDifferentElementInSortedArray (Index, Array, *Count);
|
|
}
|
|
|
|
*Count = NewCount;
|
|
}
|
|
|
|
/**
|
|
Return TRUE when Address is in the Range.
|
|
|
|
@param Address The address to check.
|
|
@param Range The range to check.
|
|
@return TRUE when Address is in the Range.
|
|
**/
|
|
BOOLEAN
|
|
AddressInRange (
|
|
IN UINT64 Address,
|
|
IN MTRR_MEMORY_RANGE Range
|
|
)
|
|
{
|
|
return (Address >= Range.BaseAddress) && (Address <= Range.BaseAddress + Range.Length - 1);
|
|
}
|
|
|
|
/**
|
|
Get the overlap bit flag.
|
|
|
|
@param RawMemoryRanges Raw memory ranges.
|
|
@param RawMemoryRangeCount Count of raw memory ranges.
|
|
@param Address The address to check.
|
|
**/
|
|
UINT64
|
|
GetOverlapBitFlag (
|
|
IN MTRR_MEMORY_RANGE *RawMemoryRanges,
|
|
IN UINT32 RawMemoryRangeCount,
|
|
IN UINT64 Address
|
|
)
|
|
{
|
|
UINT64 OverlapBitFlag;
|
|
UINT32 Index;
|
|
|
|
OverlapBitFlag = 0;
|
|
for (Index = 0; Index < RawMemoryRangeCount; Index++) {
|
|
if (AddressInRange (Address, RawMemoryRanges[Index])) {
|
|
OverlapBitFlag |= (1ull << Index);
|
|
}
|
|
}
|
|
|
|
return OverlapBitFlag;
|
|
}
|
|
|
|
/**
|
|
Return the relationship between flags.
|
|
|
|
@param Flag1 Flag 1
|
|
@param Flag2 Flag 2
|
|
|
|
@retval 0 Flag1 == Flag2
|
|
@retval 1 Flag1 is a subset of Flag2
|
|
@retval 2 Flag2 is a subset of Flag1
|
|
@retval 3 No subset relations between Flag1 and Flag2.
|
|
**/
|
|
UINT32
|
|
CheckOverlapBitFlagsRelation (
|
|
IN UINT64 Flag1,
|
|
IN UINT64 Flag2
|
|
)
|
|
{
|
|
if (Flag1 == Flag2) {
|
|
return 0;
|
|
}
|
|
|
|
if ((Flag1 | Flag2) == Flag2) {
|
|
return 1;
|
|
}
|
|
|
|
if ((Flag1 | Flag2) == Flag1) {
|
|
return 2;
|
|
}
|
|
|
|
return 3;
|
|
}
|
|
|
|
/**
|
|
Return TRUE when the Endpoint is in any of the Ranges.
|
|
|
|
@param Endpoint The endpoint to check.
|
|
@param Ranges The memory ranges.
|
|
@param RangeCount Count of memory ranges.
|
|
|
|
@retval TRUE Endpoint is in one of the range.
|
|
@retval FALSE Endpoint is not in any of the ranges.
|
|
**/
|
|
BOOLEAN
|
|
IsEndpointInRanges (
|
|
IN UINT64 Endpoint,
|
|
IN MTRR_MEMORY_RANGE *Ranges,
|
|
IN UINTN RangeCount
|
|
)
|
|
{
|
|
UINT32 Index;
|
|
|
|
for (Index = 0; Index < RangeCount; Index++) {
|
|
if (AddressInRange (Endpoint, Ranges[Index])) {
|
|
return TRUE;
|
|
}
|
|
}
|
|
|
|
return FALSE;
|
|
}
|
|
|
|
/**
|
|
Compact adjacent ranges of the same type.
|
|
|
|
@param DefaultType Default memory type.
|
|
@param PhysicalAddressBits Physical address bits.
|
|
@param EffectiveMtrrMemoryRanges Memory ranges to compact.
|
|
@param EffectiveMtrrMemoryRangesCount Return the new count of memory ranges.
|
|
**/
|
|
VOID
|
|
CompactAndExtendEffectiveMtrrMemoryRanges (
|
|
IN MTRR_MEMORY_CACHE_TYPE DefaultType,
|
|
IN UINT32 PhysicalAddressBits,
|
|
IN OUT MTRR_MEMORY_RANGE **EffectiveMtrrMemoryRanges,
|
|
IN OUT UINTN *EffectiveMtrrMemoryRangesCount
|
|
)
|
|
{
|
|
UINT64 MaxAddress;
|
|
UINTN NewRangesCountAtMost;
|
|
MTRR_MEMORY_RANGE *NewRanges;
|
|
UINTN NewRangesCountActual;
|
|
MTRR_MEMORY_RANGE *CurrentRangeInNewRanges;
|
|
MTRR_MEMORY_CACHE_TYPE CurrentRangeTypeInOldRanges;
|
|
|
|
MTRR_MEMORY_RANGE *OldRanges;
|
|
MTRR_MEMORY_RANGE OldLastRange;
|
|
UINTN OldRangesIndex;
|
|
|
|
NewRangesCountActual = 0;
|
|
NewRangesCountAtMost = *EffectiveMtrrMemoryRangesCount + 2; // At most with 2 more range entries.
|
|
NewRanges = (MTRR_MEMORY_RANGE *)calloc (NewRangesCountAtMost, sizeof (MTRR_MEMORY_RANGE));
|
|
OldRanges = *EffectiveMtrrMemoryRanges;
|
|
if (OldRanges[0].BaseAddress > 0) {
|
|
NewRanges[NewRangesCountActual].BaseAddress = 0;
|
|
NewRanges[NewRangesCountActual].Length = OldRanges[0].BaseAddress;
|
|
NewRanges[NewRangesCountActual].Type = DefaultType;
|
|
NewRangesCountActual++;
|
|
}
|
|
|
|
OldRangesIndex = 0;
|
|
while (OldRangesIndex < *EffectiveMtrrMemoryRangesCount) {
|
|
CurrentRangeTypeInOldRanges = OldRanges[OldRangesIndex].Type;
|
|
CurrentRangeInNewRanges = NULL;
|
|
if (NewRangesCountActual > 0) {
|
|
// We need to check CurrentNewRange first before generate a new NewRange.
|
|
CurrentRangeInNewRanges = &NewRanges[NewRangesCountActual - 1];
|
|
}
|
|
|
|
if ((CurrentRangeInNewRanges != NULL) && (CurrentRangeInNewRanges->Type == CurrentRangeTypeInOldRanges)) {
|
|
CurrentRangeInNewRanges->Length += OldRanges[OldRangesIndex].Length;
|
|
} else {
|
|
NewRanges[NewRangesCountActual].BaseAddress = OldRanges[OldRangesIndex].BaseAddress;
|
|
NewRanges[NewRangesCountActual].Length += OldRanges[OldRangesIndex].Length;
|
|
NewRanges[NewRangesCountActual].Type = CurrentRangeTypeInOldRanges;
|
|
while (OldRangesIndex + 1 < *EffectiveMtrrMemoryRangesCount && OldRanges[OldRangesIndex + 1].Type == CurrentRangeTypeInOldRanges) {
|
|
OldRangesIndex++;
|
|
NewRanges[NewRangesCountActual].Length += OldRanges[OldRangesIndex].Length;
|
|
}
|
|
|
|
NewRangesCountActual++;
|
|
}
|
|
|
|
OldRangesIndex++;
|
|
}
|
|
|
|
MaxAddress = (1ull << PhysicalAddressBits) - 1;
|
|
OldLastRange = OldRanges[(*EffectiveMtrrMemoryRangesCount) - 1];
|
|
CurrentRangeInNewRanges = &NewRanges[NewRangesCountActual - 1];
|
|
if (OldLastRange.BaseAddress + OldLastRange.Length - 1 < MaxAddress) {
|
|
if (CurrentRangeInNewRanges->Type == DefaultType) {
|
|
CurrentRangeInNewRanges->Length = MaxAddress - CurrentRangeInNewRanges->BaseAddress + 1;
|
|
} else {
|
|
NewRanges[NewRangesCountActual].BaseAddress = OldLastRange.BaseAddress + OldLastRange.Length;
|
|
NewRanges[NewRangesCountActual].Length = MaxAddress - NewRanges[NewRangesCountActual].BaseAddress + 1;
|
|
NewRanges[NewRangesCountActual].Type = DefaultType;
|
|
NewRangesCountActual++;
|
|
}
|
|
}
|
|
|
|
free (*EffectiveMtrrMemoryRanges);
|
|
*EffectiveMtrrMemoryRanges = NewRanges;
|
|
*EffectiveMtrrMemoryRangesCount = NewRangesCountActual;
|
|
}
|
|
|
|
/**
|
|
Collect all the endpoints in the raw memory ranges.
|
|
|
|
@param Endpoints Return the collected endpoints.
|
|
@param EndPointCount Return the count of endpoints.
|
|
@param RawMemoryRanges Raw memory ranges.
|
|
@param RawMemoryRangeCount Count of raw memory ranges.
|
|
**/
|
|
VOID
|
|
CollectEndpoints (
|
|
IN OUT UINT64 *Endpoints,
|
|
IN OUT UINT32 *EndPointCount,
|
|
IN MTRR_MEMORY_RANGE *RawMemoryRanges,
|
|
IN UINT32 RawMemoryRangeCount
|
|
)
|
|
{
|
|
UINT32 Index;
|
|
UINT32 RawRangeIndex;
|
|
|
|
ASSERT ((RawMemoryRangeCount << 1) == *EndPointCount);
|
|
|
|
for (Index = 0; Index < *EndPointCount; Index += 2) {
|
|
RawRangeIndex = Index >> 1;
|
|
Endpoints[Index] = RawMemoryRanges[RawRangeIndex].BaseAddress;
|
|
Endpoints[Index + 1] = RawMemoryRanges[RawRangeIndex].BaseAddress + RawMemoryRanges[RawRangeIndex].Length - 1;
|
|
}
|
|
|
|
qsort (Endpoints, *EndPointCount, sizeof (UINT64), CompareFuncUint64);
|
|
RemoveDuplicatesInSortedArray (Endpoints, EndPointCount);
|
|
}
|
|
|
|
/**
|
|
Convert the MTRR BASE/MASK array to memory ranges.
|
|
|
|
@param DefaultType Default memory type.
|
|
@param PhysicalAddressBits Physical address bits.
|
|
@param RawMemoryRanges Raw memory ranges.
|
|
@param RawMemoryRangeCount Count of raw memory ranges.
|
|
@param MemoryRanges Memory ranges.
|
|
@param MemoryRangeCount Count of memory ranges.
|
|
**/
|
|
VOID
|
|
GetEffectiveMemoryRanges (
|
|
IN MTRR_MEMORY_CACHE_TYPE DefaultType,
|
|
IN UINT32 PhysicalAddressBits,
|
|
IN MTRR_MEMORY_RANGE *RawMemoryRanges,
|
|
IN UINT32 RawMemoryRangeCount,
|
|
OUT MTRR_MEMORY_RANGE *MemoryRanges,
|
|
OUT UINTN *MemoryRangeCount
|
|
)
|
|
{
|
|
UINTN Index;
|
|
UINT32 AllEndPointsCount;
|
|
UINT64 *AllEndPointsInclusive;
|
|
UINT32 AllRangePiecesCountMax;
|
|
MTRR_MEMORY_RANGE *AllRangePieces;
|
|
UINTN AllRangePiecesCountActual;
|
|
UINT64 OverlapBitFlag1;
|
|
UINT64 OverlapBitFlag2;
|
|
INT32 OverlapFlagRelation;
|
|
|
|
if (RawMemoryRangeCount == 0) {
|
|
MemoryRanges[0].BaseAddress = 0;
|
|
MemoryRanges[0].Length = (1ull << PhysicalAddressBits);
|
|
MemoryRanges[0].Type = DefaultType;
|
|
*MemoryRangeCount = 1;
|
|
return;
|
|
}
|
|
|
|
AllEndPointsCount = RawMemoryRangeCount << 1;
|
|
AllEndPointsInclusive = calloc (AllEndPointsCount, sizeof (UINT64));
|
|
AllRangePiecesCountMax = RawMemoryRangeCount * 3 + 1;
|
|
AllRangePieces = calloc (AllRangePiecesCountMax, sizeof (MTRR_MEMORY_RANGE));
|
|
CollectEndpoints (AllEndPointsInclusive, &AllEndPointsCount, RawMemoryRanges, RawMemoryRangeCount);
|
|
|
|
for (Index = 0, AllRangePiecesCountActual = 0; Index < AllEndPointsCount - 1; Index++) {
|
|
OverlapBitFlag1 = GetOverlapBitFlag (RawMemoryRanges, RawMemoryRangeCount, AllEndPointsInclusive[Index]);
|
|
OverlapBitFlag2 = GetOverlapBitFlag (RawMemoryRanges, RawMemoryRangeCount, AllEndPointsInclusive[Index + 1]);
|
|
OverlapFlagRelation = CheckOverlapBitFlagsRelation (OverlapBitFlag1, OverlapBitFlag2);
|
|
switch (OverlapFlagRelation) {
|
|
case 0: // [1, 2]
|
|
AllRangePieces[AllRangePiecesCountActual].BaseAddress = AllEndPointsInclusive[Index];
|
|
AllRangePieces[AllRangePiecesCountActual].Length = AllEndPointsInclusive[Index + 1] - AllEndPointsInclusive[Index] + 1;
|
|
AllRangePiecesCountActual++;
|
|
break;
|
|
case 1: // [1, 2)
|
|
AllRangePieces[AllRangePiecesCountActual].BaseAddress = AllEndPointsInclusive[Index];
|
|
AllRangePieces[AllRangePiecesCountActual].Length = (AllEndPointsInclusive[Index + 1] - 1) - AllEndPointsInclusive[Index] + 1;
|
|
AllRangePiecesCountActual++;
|
|
break;
|
|
case 2: // (1, 2]
|
|
AllRangePieces[AllRangePiecesCountActual].BaseAddress = AllEndPointsInclusive[Index] + 1;
|
|
AllRangePieces[AllRangePiecesCountActual].Length = AllEndPointsInclusive[Index + 1] - (AllEndPointsInclusive[Index] + 1) + 1;
|
|
AllRangePiecesCountActual++;
|
|
|
|
if (!IsEndpointInRanges (AllEndPointsInclusive[Index], AllRangePieces, AllRangePiecesCountActual)) {
|
|
AllRangePieces[AllRangePiecesCountActual].BaseAddress = AllEndPointsInclusive[Index];
|
|
AllRangePieces[AllRangePiecesCountActual].Length = 1;
|
|
AllRangePiecesCountActual++;
|
|
}
|
|
|
|
break;
|
|
case 3: // (1, 2)
|
|
AllRangePieces[AllRangePiecesCountActual].BaseAddress = AllEndPointsInclusive[Index] + 1;
|
|
AllRangePieces[AllRangePiecesCountActual].Length = (AllEndPointsInclusive[Index + 1] - 1) - (AllEndPointsInclusive[Index] + 1) + 1;
|
|
if (AllRangePieces[AllRangePiecesCountActual].Length == 0) {
|
|
// Only in case 3 can exists Length=0, we should skip such "segment".
|
|
break;
|
|
}
|
|
|
|
AllRangePiecesCountActual++;
|
|
if (!IsEndpointInRanges (AllEndPointsInclusive[Index], AllRangePieces, AllRangePiecesCountActual)) {
|
|
AllRangePieces[AllRangePiecesCountActual].BaseAddress = AllEndPointsInclusive[Index];
|
|
AllRangePieces[AllRangePiecesCountActual].Length = 1;
|
|
AllRangePiecesCountActual++;
|
|
}
|
|
|
|
break;
|
|
default:
|
|
ASSERT (FALSE);
|
|
}
|
|
}
|
|
|
|
for (Index = 0; Index < AllRangePiecesCountActual; Index++) {
|
|
DetermineMemoryCacheType (DefaultType, &AllRangePieces[Index], RawMemoryRanges, RawMemoryRangeCount);
|
|
}
|
|
|
|
CompactAndExtendEffectiveMtrrMemoryRanges (DefaultType, PhysicalAddressBits, &AllRangePieces, &AllRangePiecesCountActual);
|
|
ASSERT (*MemoryRangeCount >= AllRangePiecesCountActual);
|
|
memcpy (MemoryRanges, AllRangePieces, AllRangePiecesCountActual * sizeof (MTRR_MEMORY_RANGE));
|
|
*MemoryRangeCount = AllRangePiecesCountActual;
|
|
|
|
free (AllEndPointsInclusive);
|
|
free (AllRangePieces);
|
|
}
|