https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Hao Wu <hao.a.wu@intel.com> Reviewed-by: Jian J Wang <jian.j.wang@intel.com>
		
			
				
	
	
		
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			123 lines
		
	
	
		
			4.9 KiB
		
	
	
	
		
			C
		
	
	
	
	
	
| /** @file
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|   The default version of EFI_PEI_PCI_CFG2_PPI support published by PeiServices in
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|   PeiCore initialization phase.
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| 
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|   EFI_PEI_PCI_CFG2_PPI is installed by the PEIM which supports a PCI root bridge.
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|   When PeiCore is started, the default version of EFI_PEI_PCI_CFG2_PPI will be assigned
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|   to PeiServices table.
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| 
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| Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
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| SPDX-License-Identifier: BSD-2-Clause-Patent
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| 
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| **/
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| 
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| #include "PeiMain.h"
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| 
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| ///
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| /// This default instance of EFI_PEI_PCI_CFG2_PPI install assigned to EFI_PEI_SERVICE.PciCfg
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| /// when PeiCore's initialization.
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| ///
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| EFI_PEI_PCI_CFG2_PPI gPeiDefaultPciCfg2Ppi = {
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|   PeiDefaultPciCfg2Read,
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|   PeiDefaultPciCfg2Write,
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|   PeiDefaultPciCfg2Modify
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| };
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| 
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| /**
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|   Reads from a given location in the PCI configuration space.
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| 
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|   If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then
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|   return EFI_NOT_YET_AVAILABLE.
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| 
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|   @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.
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|   @param  This            Pointer to local data for the interface.
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|   @param  Width           The width of the access. Enumerated in bytes.
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|                           See EFI_PEI_PCI_CFG_PPI_WIDTH above.
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|   @param  Address         The physical address of the access. The format of
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|                           the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
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|   @param  Buffer          A pointer to the buffer of data.
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| 
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|   @retval EFI_SUCCESS           The function completed successfully.
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|   @retval EFI_INVALID_PARAMETER The invalid access width.
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|   @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.
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| 
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| **/
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| EFI_STATUS
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| EFIAPI
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| PeiDefaultPciCfg2Read (
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|   IN CONST  EFI_PEI_SERVICES          **PeiServices,
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|   IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,
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|   IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,
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|   IN        UINT64                    Address,
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|   IN OUT    VOID                      *Buffer
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|   )
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| {
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|   return EFI_NOT_AVAILABLE_YET;
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| }
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| 
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| /**
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|   Write to a given location in the PCI configuration space.
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| 
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|   If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then
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|   return EFI_NOT_YET_AVAILABLE.
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| 
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|   @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.
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|   @param  This            Pointer to local data for the interface.
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|   @param  Width           The width of the access. Enumerated in bytes.
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|                           See EFI_PEI_PCI_CFG_PPI_WIDTH above.
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|   @param  Address         The physical address of the access. The format of
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|                           the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.
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|   @param  Buffer          A pointer to the buffer of data.
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| 
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|   @retval EFI_SUCCESS           The function completed successfully.
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|   @retval EFI_INVALID_PARAMETER The invalid access width.
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|   @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.
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| **/
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| EFI_STATUS
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| EFIAPI
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| PeiDefaultPciCfg2Write (
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|   IN CONST  EFI_PEI_SERVICES          **PeiServices,
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|   IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,
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|   IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,
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|   IN        UINT64                    Address,
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|   IN OUT    VOID                      *Buffer
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|   )
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| {
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|   return EFI_NOT_AVAILABLE_YET;
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| }
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| 
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| /**
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|   This function performs a read-modify-write operation on the contents from a given
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|   location in the PCI configuration space.
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|   If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then
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|   return EFI_NOT_YET_AVAILABLE.
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| 
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|   @param  PeiServices     An indirect pointer to the PEI Services Table
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|                           published by the PEI Foundation.
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|   @param  This            Pointer to local data for the interface.
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|   @param  Width           The width of the access. Enumerated in bytes. Type
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|                           EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().
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|   @param  Address         The physical address of the access.
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|   @param  SetBits         Points to value to bitwise-OR with the read configuration value.
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|                           The size of the value is determined by Width.
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|   @param  ClearBits       Points to the value to negate and bitwise-AND with the read configuration value.
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|                           The size of the value is determined by Width.
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| 
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|   @retval EFI_SUCCESS           The function completed successfully.
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|   @retval EFI_INVALID_PARAMETER The invalid access width.
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|   @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.
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| **/
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| EFI_STATUS
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| EFIAPI
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| PeiDefaultPciCfg2Modify (
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|   IN CONST  EFI_PEI_SERVICES          **PeiServices,
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|   IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,
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|   IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,
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|   IN        UINT64                    Address,
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|   IN        VOID                      *SetBits,
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|   IN        VOID                      *ClearBits
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|   )
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| {
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|   return EFI_NOT_AVAILABLE_YET;
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| }
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