2dbcb8f0a3
In the previous version, every cores had the same stack size. To avoid to waste memory with secondary core stacks, the primary core stack size is now different from the secondary cores stack size. These are the Stack PCDs and their default values: gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000 gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000 gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0 gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12415 6f19259b-4bc3-4df7-8a09-765794883524
94 lines
2.9 KiB
ArmAsm
94 lines
2.9 KiB
ArmAsm
//
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// Copyright (c) 2011, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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.text
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.align 3
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GCC_ASM_IMPORT(CEntryPoint)
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GCC_ASM_IMPORT(ArmReadMpidr)
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GCC_ASM_EXPORT(_ModuleEntryPoint)
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StartupAddr: .word CEntryPoint
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ASM_PFX(_ModuleEntryPoint):
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// Identify CPU ID
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bl ASM_PFX(ArmReadMpidr)
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// Get ID of this CPU in Multicore system
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
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and r0, r0, r1
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// Calculate the top of the primary stack
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoresStackBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
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add r2, r2, r1
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// Is it the Primary Core ?
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r1)
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cmp r0, r1
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beq _SetupPrimaryCoreStack
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_SetupSecondaryCoreStack:
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// r2 = Top of the primary stack = Base of the Secondary Stacks
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// Get the position of the cores (ClusterId * 4) + CoreId
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GetCorePositionInStack(r3, r0, r1)
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// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
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add r3, r3, #1
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r1)
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// StackOffset = CorePos * StackSize
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mul r3, r3, r1
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// SP = StackBase + StackOffset
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add sp, r2, r3
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b _PrepareArguments
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_SetupPrimaryCoreStack:
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// r2 = Top of the primary stack
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LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r3)
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// The reserved space for global variable must be 8-bytes aligned for pushing
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// 64-bit variable on the stack
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SetPrimaryStack (r2, r3, r1)
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// Set all the PEI global variables to 0
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mov r3, sp
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mov r1, #0x0
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_InitGlobals:
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str r1, [r3], #4
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cmp r3, r2
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blt _InitGlobals
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_PrepareArguments:
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// The PEI Core Entry Point has been computed by GenFV and stored in the second entry of the Reset Vector
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LoadConstantToReg (FixedPcdGet32(PcdNormalFvBaseAddress), r2)
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add r2, r2, #4
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ldr r1, [r2]
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// move sec startup address into a data register
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// ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr r2, StartupAddr
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// jump to PrePeiCore C code
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// r0 = mp_id
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// r1 = pei_core_address
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blx r2
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_NeverReturn:
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b _NeverReturn
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