2dbcb8f0a3
In the previous version, every cores had the same stack size. To avoid to waste memory with secondary core stacks, the primary core stack size is now different from the secondary cores stack size. These are the Stack PCDs and their default values: gArmPlatformTokenSpaceGuid.PcdCPUCoresSecStackBase|0 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecPrimaryStackSize|0x10000 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecSecondaryStackSize|0x1000 gArmPlatformTokenSpaceGuid.PcdCPUCoresSecMonStackBase|0 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecMonStackSize|0x1000 gArmPlatformTokenSpaceGuid.PcdCPUCoresStackBase|0 gArmPlatformTokenSpaceGuid.PcdCPUCorePrimaryStackSize|0x10000 gArmPlatformTokenSpaceGuid.PcdCPUCoreSecondaryStackSize|0x1000 git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@12415 6f19259b-4bc3-4df7-8a09-765794883524
164 lines
5.0 KiB
NASM
164 lines
5.0 KiB
NASM
//
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// Copyright (c) 2011, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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INCLUDE AsmMacroIoLib.inc
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IMPORT CEntryPoint
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IMPORT ArmReadMpidr
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IMPORT ArmIsMPCore
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EXPORT _ModuleEntryPoint
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PRESERVE8
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AREA PrePiCoreEntryPoint, CODE, READONLY
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StartupAddr DCD CEntryPoint
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_ModuleEntryPoint
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// Get ID of this CPU in Multicore system
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bl ArmReadMpidr
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCoreMask), r1)
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and r5, r0, r1
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_SetSVCMode
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// Enter SVC mode
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mov r1, #0x13|0x80|0x40
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msr CPSR_c, r1
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// Check if we can install the stack at the top of the System Memory or if we need
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// to install the stacks at the bottom of the Firmware Device (case the FD is located
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// at the top of the DRAM)
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_SetupStackPosition
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// Compute Top of System Memory
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LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryBase), r1)
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LoadConstantToReg (FixedPcdGet32(PcdSystemMemorySize), r2)
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add r1, r1, r2 // r1 = SystemMemoryTop = PcdSystemMemoryBase + PcdSystemMemorySize
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// Calculate Top of the Firmware Device
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LoadConstantToReg (FixedPcdGet32(PcdNormalFdBaseAddress), r2)
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LoadConstantToReg (FixedPcdGet32(PcdNormalFdSize), r3)
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add r3, r3, r2 // r4 = FdTop = PcdNormalFdBaseAddress + PcdNormalFdSize
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// UEFI Memory Size (stacks are allocated in this region)
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LoadConstantToReg (FixedPcdGet32(PcdSystemMemoryUefiRegionSize), r4)
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//
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// Reserve the memory for the UEFI region (contain stacks on its top)
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//
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// Calculate how much space there is between the top of the Firmware and the Top of the System Memory
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subs r0, r1, r3 // r0 = SystemMemoryTop - FdTop
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bmi _SetupStack // Jump if negative (FdTop > SystemMemoryTop). Case when the PrePi is in XIP memory outside of the DRAM
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cmp r0, r4
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bge _SetupStack
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// Case the top of stacks is the FdBaseAddress
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mov r1, r2
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_SetupStack
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// r1 contains the top of the stack (and the UEFI Memory)
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// Calculate the Base of the UEFI Memory
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sub r6, r1, r4
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_GetStackBase
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// Compute Base of Normal stacks for CPU Cores
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// Is it MpCore system
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bl ArmIsMPCore
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cmp r0, #0
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// Case it is not an MP Core system. Just setup the primary core
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beq _SetupUnicoreStack
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_GetStackBaseMpCore
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// Stack for the primary core = PrimaryCoreStack
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LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r2)
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sub r7, r1, r2
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// Stack for the secondary core = Number of Cluster * (4 Core per cluster) * SecondaryStackSize
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LoadConstantToReg (FixedPcdGet32(PcdClusterCount), r2)
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lsl r2, r2, #2
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LoadConstantToReg (FixedPcdGet32(PcdCPUCoreSecondaryStackSize), r3)
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mul r2, r2, r3
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sub r7, r7, r2
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// The top of the Mpcore Stacks is in r1
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// The base of the MpCore Stacks is in r7
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// Is it the Primary Core ?
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LoadConstantToReg (FixedPcdGet32(PcdArmPrimaryCore), r4)
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cmp r0, r4
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beq _SetupPrimaryCoreStack
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_SetupSecondaryCoreStack
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// Base of the stack for the secondary cores is in r7
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// Get the position of the cores (ClusterId * 4) + CoreId
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GetCorePositionInStack(r0, r5, r4)
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// The stack starts at the top of the stack region. Add '1' to the Core Position to get the top of the stack
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add r0, r0, #1
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// Get the offset for the Secondary Stack
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mul r0, r0, r3
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add sp, r7, r0
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bne _PrepareArguments
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_SetupPrimaryCoreStack
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// The top of the Mpcore Stacks is in r1
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LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)
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// The reserved space for global variable must be 8-bytes aligned for pushing
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// 64-bit variable on the stack
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SetPrimaryStack (r1, r2, r3)
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_SetGlobals
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// Set all the PrePi global variables to 0
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mov r3, sp
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mov r2, #0x0
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_InitGlobals
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str r2, [r3], #4
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cmp r3, r1
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blt _InitGlobals
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_PrepareArguments
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// Move sec startup address into a data register
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// Ensure we're jumping to FV version of the code (not boot remapped alias)
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ldr r2, StartupAddr
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// Jump to PrePiCore C code
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// r0 = MpId
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// r1 = UefiMemoryBase
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blx r2
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_NeverReturn
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b _NeverReturn
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_SetupUnicoreStack
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// The top of the Unicore Stack is in r1
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LoadConstantToReg (FixedPcdGet32(PcdPeiGlobalVariableSize), r2)
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LoadConstantToReg (FixedPcdGet32(PcdCPUCorePrimaryStackSize), r3)
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// Calculate the bottom of the primary stack (StackBase)
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sub r7, r1, r3
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// The reserved space for global variable must be 8-bytes aligned for pushing
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// 64-bit variable on the stack
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SetPrimaryStack (r1, r2, r3)
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b _SetGlobals
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END
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