dcdfb2f083
Implement all of the FVB protocol functions on top of the SmmStore as a library. The library consumes the introduced gEfiSmmStoreInfoHobGuid. The SMI handler uses a fixed communication buffer in reserved DRAM. To initiate a transaction you must write to the I/O APM_CNT port. Tests on Intel(R) Xeon(R) E-2288G CPU @ 3.70G showed that the SMI isn't triggered with a probability of 1:40 of all cases when called in a tight loop. The CPU continues running and the SMI is triggeres asynchronously a few clock cycles later. coreboot only handels synchronous APM request and does nothing on asynchronous APM triggers. As there's no livesign from SMM it's impossible to tell if the handler has run. Just wait a bit and try again to trigger a synchronous SMI. Tests confirmed that out of 5 million tries the SMI is now always handled. When a synchronous SMI happens with the correct write to the APM_CNT port, the ebx register is checked first that it doesn't point to SMRAM. If it doesn't it's used to read in the arguments that define a SmmStore transaction. The SMI handler will only operate on a predefined and memory mapped region in the boot media. Cc: Guo Dong <guo.dong@intel.com> Cc: Ray Ni <ray.ni@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Benjamin You <benjamin.you@intel.com> Cc: Sean Rhodes <sean@starlabs.systems> Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Change-Id: Id4182623e4198c6512d3fe6ec20adf6738586d9b
49 lines
1.6 KiB
NASM
49 lines
1.6 KiB
NASM
;------------------------------------------------------------------------------ ;
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; Copyright (c) 2022, 9elements GmbH. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;-------------------------------------------------------------------------------
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%include "Nasm.inc"
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DEFAULT REL
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SECTION .text
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;UINTN
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;EFIAPI
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;TriggerSmi (
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; UINTN Cmd,
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; UINTN Arg,
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; UINTN Retry
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; )
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global ASM_PFX(TriggerSmi)
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ASM_PFX(TriggerSmi):
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push rbx
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mov rax, rcx ; Smi handler expect Cmd in RAX
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mov rbx, rdx ; Smi handler expect Argument in RBX
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@Trigger:
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out 0b2h, al ; write to APM port to trigger SMI
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; There might ba a delay between writing the Smi trigger register and
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; entering SMM, in which case the Smi handler will do nothing as only
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; synchronous Smis are handled. In addition when there's no Smi handler
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; or the SmmStore feature isn't compiled in, no register will be modified.
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; As there's no livesign from SMM, just wait a bit for the handler to fire,
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; and then try again.
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cmp rax, rcx ; Check if rax was modified by SMM
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jne @Return ; SMM modified rax, return now
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push rcx ; save rcx to stack
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mov rcx, 10000
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rep pause ; add a small delay
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pop rcx ; restore rcx
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cmp r8, 0
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je @Return
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dec r8
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jmp @Trigger
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@Return:
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pop rbx
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ret
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