716087e2be
We are going to reduce reserved memory consumption by page table buffer, then OS can have more available memory to use. Take PhysicalAddressBits = 48 and 2MB page granularity as example, 1:1 Virtual to Physical identity mapping page table buffer needs to be ((512 + 1) * 512 + 1) * 4096 = 1075843072 bytes = 0x40201000 bytes. The code is updated to build 4G page table by default and only use 8 extra pages to handles > 4G request by page fault. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18069 6f19259b-4bc3-4df7-8a09-765794883524
82 lines
2.3 KiB
ArmAsm
82 lines
2.3 KiB
ArmAsm
## @file
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# This is the assembly code for page fault handler hook.
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#
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# Copyright (c) 2015, Intel Corporation. All rights reserved.<BR>
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#
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# This program and the accompanying materials are
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# licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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##
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ASM_GLOBAL ASM_PFX(PageFaultHandlerHook)
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ASM_PFX(PageFaultHandlerHook):
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addq $-0x10, %rsp
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# save rax
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movq %rax, 0x08(%rsp)
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# pushq %rax # save all volatile registers
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pushq %rcx
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pushq %rdx
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pushq %r8
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pushq %r9
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pushq %r10
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pushq %r11
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# save volatile fp registers
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# 68h + 08h(for alignment)
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addq $-0x70, %rsp
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stmxcsr 0x60(%rsp)
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movdqa %xmm0, 0x0(%rsp)
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movdqa %xmm1, 0x10(%rsp)
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movdqa %xmm2, 0x20(%rsp)
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movdqa %xmm3, 0x30(%rsp)
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movdqa %xmm4, 0x40(%rsp)
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movdqa %xmm5, 0x50(%rsp)
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addq $-0x20, %rsp
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call ASM_PFX(PageFaultHandler)
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addq $0x20, %rsp
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# load volatile fp registers
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ldmxcsr 0x60(%rsp)
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movdqa 0x0(%rsp), %xmm0
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movdqa 0x10(%rsp), %xmm1
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movdqa 0x20(%rsp), %xmm2
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movdqa 0x30(%rsp), %xmm3
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movdqa 0x40(%rsp), %xmm4
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movdqa 0x50(%rsp), %xmm5
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addq $0x70, %rsp
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popq %r11
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popq %r10
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popq %r9
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popq %r8
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popq %rdx
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popq %rcx
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# popq %rax # restore all volatile registers
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addq $0x10, %rsp
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# rax returned from PageFaultHandler is NULL or OriginalHandler address
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# NULL if the page fault is handled by PageFaultHandler
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# OriginalHandler address if the page fault is not handled by PageFaultHandler
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testq %rax, %rax
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# save OriginalHandler address
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movq %rax, -0x10(%rsp)
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# restore rax
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movq -0x08(%rsp), %rax
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jz L1
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# jump to OriginalHandler
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jmpq *-0x10(%rsp)
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L1:
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addq $0x08, %rsp # skip error code for PF
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iretq
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