331d92a8ba
Skip PCI enumeration, which is already handled by Coreboot, by using PciBusNoEnumerationDxe and PciRootBridgeNoEnumerationDxe from the deleted DuetPkg.
101 lines
2.6 KiB
C
101 lines
2.6 KiB
C
/*++
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Copyright (c) 2005 - 2012, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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PciPowerManagement.c
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Abstract:
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PCI Bus Driver
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Revision History
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--*/
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#include "PciBus.h"
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EFI_STATUS
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EFIAPI
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ResetPowerManagementFeature (
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IN PCI_IO_DEVICE *PciIoDevice
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)
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/*++
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Routine Description:
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This function is intended to turn off PWE assertion and
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put the device to D0 state if the device supports
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PCI Power Management.
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Arguments:
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Returns:
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None
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--*/
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{
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EFI_STATUS Status;
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UINT8 PowerManagementRegBlock;
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UINT16 PowerManagementCSR;
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PowerManagementRegBlock = 0;
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Status = LocateCapabilityRegBlock (
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PciIoDevice,
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EFI_PCI_CAPABILITY_ID_PMI,
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&PowerManagementRegBlock,
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NULL
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);
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if (EFI_ERROR (Status)) {
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return EFI_UNSUPPORTED;
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}
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//
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// Turn off the PWE assertion and put the device into D0 State
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//
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//
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// Read PMCSR
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//
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Status = PciIoDevice->PciIo.Pci.Read (
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&PciIoDevice->PciIo,
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EfiPciIoWidthUint16,
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PowerManagementRegBlock + 4,
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1,
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&PowerManagementCSR
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);
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if (!EFI_ERROR (Status)) {
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//
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// Clear PME_Status bit
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//
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PowerManagementCSR |= BIT15;
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//
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// Clear PME_En bit. PowerState = D0.
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//
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PowerManagementCSR &= ~(BIT8 | BIT1 | BIT0);
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//
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// Write PMCSR
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//
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Status = PciIoDevice->PciIo.Pci.Write (
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&PciIoDevice->PciIo,
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EfiPciIoWidthUint16,
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PowerManagementRegBlock + 4,
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1,
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&PowerManagementCSR
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);
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}
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return Status;
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}
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