REF: https://bugzilla.tianocore.org/show_bug.cgi?id=1381 In Dispatch mode FSP may consume PPI directly so creating FSPM_ARCH_CONFIG_PPI to align with FSPM_ARCH_UPD. Also Keeps new structure size 8 bytes alignment as other structures. Test: Verified on internal platform to boot with this PPI installed successfully. Cc: Nate DeSimone <nathaniel.l.desimone@intel.com> Cc: Star Zeng <star.zeng@intel.com> Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Chasel Chiu <chasel.chiu@intel.com> Reviewed-by: Nate DeSimone <nathaniel.l.desimone@intel.com> Reviewed-by: Star Zeng <star.zeng@intel.com>