3222e7b1ef
Once divided by 2, the size should be 4-byte aligned to ensure the stack pointer is 4-byte aligned. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@13044 6f19259b-4bc3-4df7-8a09-765794883524
68 lines
2.6 KiB
C
68 lines
2.6 KiB
C
/** @file
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*
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* Copyright (c) 2011-2012, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#include "PrePeiCore.h"
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VOID
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EFIAPI
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SecondaryMain (
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IN UINTN MpId
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)
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{
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ASSERT(FALSE);
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}
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VOID
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EFIAPI
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PrimaryMain (
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IN EFI_PEI_CORE_ENTRY_POINT PeiCoreEntryPoint
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)
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{
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EFI_SEC_PEI_HAND_OFF SecCoreData;
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UINTN PpiListSize;
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EFI_PEI_PPI_DESCRIPTOR *PpiList;
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UINTN TemporaryRamBase;
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UINTN TemporaryRamSize;
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CreatePpiList (&PpiListSize, &PpiList);
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// Adjust the Temporary Ram as the new Ppi List (Common + Platform Ppi Lists) is created at
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// the base of the primary core stack
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PpiListSize = ALIGN_VALUE(PpiListSize, 0x4);
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TemporaryRamBase = (UINTN)PcdGet32 (PcdCPUCoresStackBase) + PpiListSize;
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TemporaryRamSize = (UINTN)PcdGet32 (PcdCPUCorePrimaryStackSize) - PpiListSize;
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// Make sure the size is 8-byte aligned. Once divided by 2, the size should be 4-byte aligned
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// to ensure the stack pointer is 4-byte aligned.
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TemporaryRamSize = TemporaryRamSize - (TemporaryRamSize & (0x8-1));
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//
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// Bind this information into the SEC hand-off state
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// Note: this must be in sync with the stuff in the asm file
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// Note also: HOBs (pei temp ram) MUST be above stack
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//
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SecCoreData.DataSize = sizeof(EFI_SEC_PEI_HAND_OFF);
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SecCoreData.BootFirmwareVolumeBase = (VOID *)(UINTN)PcdGet32 (PcdFvBaseAddress);
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SecCoreData.BootFirmwareVolumeSize = PcdGet32 (PcdFvSize);
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SecCoreData.TemporaryRamBase = (VOID *)TemporaryRamBase; // We run on the primary core (and so we use the first stack)
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SecCoreData.TemporaryRamSize = TemporaryRamSize;
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SecCoreData.PeiTemporaryRamBase = SecCoreData.TemporaryRamBase;
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SecCoreData.PeiTemporaryRamSize = SecCoreData.TemporaryRamSize / 2;
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SecCoreData.StackBase = (VOID *)ALIGN_VALUE((UINTN)(SecCoreData.TemporaryRamBase) + SecCoreData.PeiTemporaryRamSize, 0x4);
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SecCoreData.StackSize = (TemporaryRamBase + TemporaryRamSize) - (UINTN)SecCoreData.StackBase;
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// Jump to PEI core entry point
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(PeiCoreEntryPoint)(&SecCoreData, PpiList);
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}
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