f57387d54b
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10435 6f19259b-4bc3-4df7-8a09-765794883524
159 lines
6.4 KiB
C
159 lines
6.4 KiB
C
/*++
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Copyright (c) 2005, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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CpuSaveState.h
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Abstract:
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Define data structures used by EFI_SMM_CPU_SAVE_STATE protocol.
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Revision History
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++*/
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#ifndef _CPUSAVESTATE_H_
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#define _CPUSAVESTATE_H_
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typedef unsigned char ASM_UINT8;
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typedef ASM_UINT8 ASM_BOOL;
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typedef unsigned short ASM_UINT16;
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typedef unsigned long ASM_UINT32;
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#ifdef _H2INC
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typedef double ASM_UINT64;
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#else
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typedef UINT64 ASM_UINT64;
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#endif
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#ifndef __GNUC__
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#pragma pack (push)
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#pragma pack (1)
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#endif
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typedef struct _EFI_SMM_CPU_STATE32 {
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ASM_UINT8 Reserved1[0xf8]; // fe00h
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ASM_UINT32 SMBASE; // fef8h
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ASM_UINT32 SMMRevId; // fefch
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ASM_UINT16 IORestart; // ff00h
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ASM_UINT16 AutoHALTRestart; // ff02h
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ASM_UINT32 IEDBASE; // ff04h
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ASM_UINT8 Reserved2[0x98]; // ff08h
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ASM_UINT32 IOMemAddr; // ffa0h
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ASM_UINT32 IOMisc; // ffa4h
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ASM_UINT32 _ES;
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ASM_UINT32 _CS;
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ASM_UINT32 _SS;
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ASM_UINT32 _DS;
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ASM_UINT32 _FS;
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ASM_UINT32 _GS;
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ASM_UINT32 _LDTBase;
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ASM_UINT32 _TR;
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ASM_UINT32 _DR7;
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ASM_UINT32 _DR6;
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ASM_UINT32 _EAX;
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ASM_UINT32 _ECX;
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ASM_UINT32 _EDX;
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ASM_UINT32 _EBX;
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ASM_UINT32 _ESP;
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ASM_UINT32 _EBP;
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ASM_UINT32 _ESI;
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ASM_UINT32 _EDI;
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ASM_UINT32 _EIP;
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ASM_UINT32 _EFLAGS;
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ASM_UINT32 _CR3;
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ASM_UINT32 _CR0;
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} EFI_SMM_CPU_STATE32;
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typedef struct _EFI_SMM_CPU_STATE64 {
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ASM_UINT8 Reserved1[0x1d0]; // fc00h
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ASM_UINT32 GdtBaseHiDword; // fdd0h
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ASM_UINT32 LdtBaseHiDword; // fdd4h
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ASM_UINT32 IdtBaseHiDword; // fdd8h
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ASM_UINT8 Reserved2[0xc]; // fddch
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ASM_UINT64 IO_EIP; // fde8h
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ASM_UINT8 Reserved3[0x50]; // fdf0h
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ASM_UINT32 _CR4; // fe40h
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ASM_UINT8 Reserved4[0x48]; // fe44h
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ASM_UINT32 GdtBaseLoDword; // fe8ch
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ASM_UINT32 GdtLimit; // fe90h
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ASM_UINT32 IdtBaseLoDword; // fe94h
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ASM_UINT32 IdtLimit; // fe98h
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ASM_UINT32 LdtBaseLoDword; // fe9ch
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ASM_UINT32 LdtLimit; // fea0h
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ASM_UINT32 LdtInfo; // fea4h
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ASM_UINT8 Reserved5[0x50]; // fea8h
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ASM_UINT32 SMBASE; // fef8h
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ASM_UINT32 SMMRevId; // fefch
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ASM_UINT16 IORestart; // ff00h
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ASM_UINT16 AutoHALTRestart; // ff02h
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ASM_UINT32 IEDBASE; // ff04h
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ASM_UINT8 Reserved6[0x14]; // ff08h
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ASM_UINT64 _R15; // ff1ch
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ASM_UINT64 _R14;
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ASM_UINT64 _R13;
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ASM_UINT64 _R12;
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ASM_UINT64 _R11;
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ASM_UINT64 _R10;
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ASM_UINT64 _R9;
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ASM_UINT64 _R8;
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ASM_UINT64 _RAX; // ff5ch
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ASM_UINT64 _RCX;
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ASM_UINT64 _RDX;
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ASM_UINT64 _RBX;
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ASM_UINT64 _RSP;
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ASM_UINT64 _RBP;
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ASM_UINT64 _RSI;
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ASM_UINT64 _RDI;
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ASM_UINT64 IOMemAddr; // ff9ch
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ASM_UINT32 IOMisc; // ffa4h
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ASM_UINT32 _ES; // ffa8h
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ASM_UINT32 _CS;
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ASM_UINT32 _SS;
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ASM_UINT32 _DS;
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ASM_UINT32 _FS;
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ASM_UINT32 _GS;
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ASM_UINT32 _LDTR; // ffc0h
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ASM_UINT32 _TR;
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ASM_UINT64 _DR7; // ffc8h
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ASM_UINT64 _DR6;
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ASM_UINT64 _RIP; // ffd8h
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ASM_UINT64 IA32_EFER; // ffe0h
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ASM_UINT64 _RFLAGS; // ffe8h
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ASM_UINT64 _CR3; // fff0h
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ASM_UINT64 _CR0; // fff8h
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} EFI_SMM_CPU_STATE64;
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#ifndef __GNUC__
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#pragma warning (push)
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#pragma warning (disable: 4201)
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#endif
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typedef union _EFI_SMM_CPU_STATE {
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struct {
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ASM_UINT8 Reserved[0x200];
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EFI_SMM_CPU_STATE32 x86;
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};
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EFI_SMM_CPU_STATE64 x64;
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} EFI_SMM_CPU_STATE;
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#ifndef __GNUC__
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#pragma warning (pop)
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#pragma pack (pop)
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#endif
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#define EFI_SMM_MIN_REV_ID_x64 0x30006
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#endif
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