4101c8753f
The GCC ARM builds have access to ADRL/LDRL macros that emit relative symbol references, i.e., references that do not require fixing up at load time (or FV generation time for XIP modules) Implement equivalent functionality for RVCT: note that this does not use movw/movt pairs, but the more compatible add/add/add or add/add/ldr sequences (which Clang does not support, unfortunately, hence the use of movw/movt for the GCC toolchain family) Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Reviewed-by: Leif Lindholm <leif.lindholm@linaro.org>
50 lines
1.3 KiB
PHP
50 lines
1.3 KiB
PHP
;%HEADER%
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;/** @file
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; Macros to work around lack of Apple support for LDR register, =expr
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;
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; Copyright (c) 2009, Apple Inc. All rights reserved.<BR>
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; Copyright (c) 2011-2012, ARM Ltd. All rights reserved.<BR>
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;
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;**/
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MACRO
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LoadConstantMacro $Data
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ldr r0, =($Data)
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MEND
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MACRO
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LoadConstantToRegMacro $Data, $Reg
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ldr $Reg, =($Data)
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MEND
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MACRO
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adrll $Reg, $Symbol
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add $Reg, pc, #-8
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RELOC R_ARM_ALU_PC_G0_NC, $Symbol
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add $Reg, $Reg, #-4
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RELOC R_ARM_ALU_PC_G1_NC, $Symbol
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add $Reg, $Reg, #0
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RELOC R_ARM_ALU_PC_G2, $Symbol
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MEND
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MACRO
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ldrl $Reg, $Symbol
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add $Reg, pc, #-8
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RELOC R_ARM_ALU_PC_G0_NC, $Symbol
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add $Reg, $Reg, #-4
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RELOC R_ARM_ALU_PC_G1_NC, $Symbol
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ldr $Reg, [$Reg, #0]
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RELOC R_ARM_LDR_PC_G2, $Symbol
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MEND
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END
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