c5b16b1b0b
git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@10594 6f19259b-4bc3-4df7-8a09-765794883524
52 lines
1.9 KiB
C
52 lines
1.9 KiB
C
/** @file
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AsmFlushCacheRange() function for IPF.
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Copyright (c) 2009, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "BaseLibInternals.h"
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/**
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Flush a range of cache lines in the cache coherency domain of the calling
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CPU.
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Flushes the cache lines specified by Address and Length. If Address is not aligned
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on a cache line boundary, then entire cache line containing Address is flushed.
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If Address + Length is not aligned on a cache line boundary, then the entire cache
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line containing Address + Length - 1 is flushed. This function may choose to flush
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the entire cache if that is more efficient than flushing the specified range. If
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Length is 0, the no cache lines are flushed. Address is returned.
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This function is only available on IPF.
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If Length is greater than (MAX_ADDRESS - Address + 1), then ASSERT().
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@param Address The base address of the instruction lines to invalidate. If
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the CPU is in a physical addressing mode, then Address is a
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physical address. If the CPU is in a virtual addressing mode,
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then Address is a virtual address.
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@param Length The number of bytes to invalidate from the instruction cache.
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@return Address.
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**/
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VOID *
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EFIAPI
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AsmFlushCacheRange (
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IN VOID *Address,
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IN UINTN Length
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)
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{
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ASSERT (Length <= MAX_ADDRESS - (UINTN)Address + 1);
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return InternalFlushCacheRange (Address, Length);
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}
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