eaa84fd553
Several assembler macros use a loop at the label "dead" to trap an error. This is difficult to debug as there is no indication of how one arrived at the loop. This change replaces dead with distinct loops locally in the macro, which means the cause of the hang is detectable to the debugger. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15273 6f19259b-4bc3-4df7-8a09-765794883524
136 lines
4.9 KiB
C
136 lines
4.9 KiB
C
/** @file
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Macros to work around lack of Apple support for LDR register, =expr
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Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
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Portions copyright (c) 2011 - 2014, ARM Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __MACRO_IO_LIBV8_H__
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#define __MACRO_IO_LIBV8_H__
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#if defined (__GNUC__)
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#define MmioWrite32(Address, Data) \
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ldr x1, =Address ; \
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ldr w0, =Data ; \
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str w0, [x1]
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#define MmioOr32(Address, OrData) \
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ldr x1, =Address ; \
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ldr w2, =OrData ; \
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ldr w0, [x1] ; \
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orr w0, w0, w2 ; \
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str w0, [x1]
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#define MmioAnd32(Address, AndData) \
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ldr x1, =Address ; \
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ldr w2, =AndData ; \
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ldr w0, [x1] ; \
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and w0, w0, w2 ; \
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str w0, [x1]
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#define MmioAndThenOr32(Address, AndData, OrData) \
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ldr x1, =Address ; \
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ldr w0, [x1] ; \
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ldr w2, =AndData ; \
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and w0, w0, w2 ; \
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ldr w2, =OrData ; \
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orr w0, w0, w2 ; \
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str w0, [x1]
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#define MmioWriteFromReg32(Address, Reg) \
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ldr x1, =Address ; \
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str Reg, [x1]
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#define MmioRead32(Address) \
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ldr x1, =Address ; \
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ldr w0, [x1]
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#define MmioReadToReg32(Address, Reg) \
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ldr x1, =Address ; \
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ldr Reg, [x1]
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#define LoadConstant(Data) \
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ldr x0, =Data
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#define LoadConstantToReg(Data, Reg) \
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ldr Reg, =Data
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#define SetPrimaryStack(StackTop, GlobalSize, Tmp, Tmp1) \
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ands Tmp, GlobalSize, #15 ; \
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mov Tmp1, #16 ; \
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sub Tmp1, Tmp1, Tmp ; \
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csel Tmp, Tmp1, Tmp, ne ; \
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add GlobalSize, GlobalSize, Tmp ; \
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sub sp, StackTop, GlobalSize ; \
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; \
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mov Tmp, sp ; \
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mov GlobalSize, #0x0 ; \
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_SetPrimaryStackInitGlobals: ; \
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cmp Tmp, StackTop ; \
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b.eq _SetPrimaryStackEnd ; \
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str GlobalSize, [Tmp], #8 ; \
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b _SetPrimaryStackInitGlobals ; \
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_SetPrimaryStackEnd:
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// Initialize the Global Variable with '0'
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#define InitializePrimaryStack(GlobalSize, Tmp1, Tmp2) \
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and Tmp1, GlobalSize, #15 ; \
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mov Tmp2, #16 ; \
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sub Tmp2, Tmp2, Tmp1 ; \
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add GlobalSize, GlobalSize, Tmp2 ; \
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; \
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mov Tmp1, sp ; \
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sub sp, sp, GlobalSize ; \
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mov GlobalSize, #0x0 ; \
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_InitializePrimaryStackLoop: ; \
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mov Tmp2, sp ; \
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cmp Tmp1, Tmp2 ; \
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bls _InitializePrimaryStackEnd ; \
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str GlobalSize, [Tmp1, #-8]! ; \
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b _InitializePrimaryStackLoop ; \
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_InitializePrimaryStackEnd:
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// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
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// This only selects between EL1 and EL2, else we die.
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// Provide the Macro with a safe temp xreg to use.
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#define EL1_OR_EL2(SAFE_XREG) \
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mrs SAFE_XREG, CurrentEL ;\
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cmp SAFE_XREG, #0x8 ;\
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b.eq 2f ;\
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cmp SAFE_XREG, #0x4 ;\
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b.ne . ;// We should never get here
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// EL1 code starts here
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// CurrentEL : 0xC = EL3; 8 = EL2; 4 = EL1
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// This only selects between EL1 and EL2 and EL3, else we die.
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// Provide the Macro with a safe temp xreg to use.
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#define EL1_OR_EL2_OR_EL3(SAFE_XREG) \
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mrs SAFE_XREG, CurrentEL ;\
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cmp SAFE_XREG, #0xC ;\
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b.eq 3f ;\
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cmp SAFE_XREG, #0x8 ;\
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b.eq 2f ;\
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cmp SAFE_XREG, #0x4 ;\
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b.ne . ;// We should never get here
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// EL1 code starts here
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#else
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#error RVCT AArch64 tool chain is not supported
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#endif // __GNUC__
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#endif // __MACRO_IO_LIBV8_H__
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