RFC: https://bugzilla.tianocore.org/show_bug.cgi?id=3429 Previously WORK_AREA_GUEST_TYPE was cleared in SetCr3ForPageTables64. This is workable for Legacy guest and SEV guest. But it doesn't work after Intel TDX is introduced. It is because all TDX CPUs (BSP and APs) start to run from 0xfffffff0, thus WORK_AREA_GUEST_TYPE will be cleared multi-times if it is TDX guest. So the clearance of WORK_AREA_GUEST_TYPE is moved to Main16 entry point in Main.asm. Note: WORK_AREA_GUEST_TYPE is only defined for ARCH_X64. For Intel TDX, its corresponding entry point is Main32 (which will be introduced in next commit in this patch-set). WORK_AREA_GUEST_TYPE will be cleared there. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Brijesh Singh <brijesh.singh@amd.com> Cc: Erdem Aktas <erdemaktas@google.com> Cc: James Bottomley <jejb@linux.ibm.com> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Min Xu <min.m.xu@intel.com> Reviewed-by: Jiewen Yao <jiewen.yao@intel.com>
108 lines
2.6 KiB
NASM
108 lines
2.6 KiB
NASM
;------------------------------------------------------------------------------
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; @file
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; Main routine of the pre-SEC code up through the jump into SEC
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;
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; Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>
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; SPDX-License-Identifier: BSD-2-Clause-Patent
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;
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;------------------------------------------------------------------------------
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BITS 16
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;
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; Modified: EBX, ECX, EDX, EBP
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;
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; @param[in,out] RAX/EAX Initial value of the EAX register
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; (BIST: Built-in Self Test)
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; @param[in,out] DI 'BP': boot-strap processor, or
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; 'AP': application processor
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; @param[out] RBP/EBP Address of Boot Firmware Volume (BFV)
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; @param[out] DS Selector allowing flat access to all addresses
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; @param[out] ES Selector allowing flat access to all addresses
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; @param[out] FS Selector allowing flat access to all addresses
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; @param[out] GS Selector allowing flat access to all addresses
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; @param[out] SS Selector allowing flat access to all addresses
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;
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; @return None This routine jumps to SEC and does not return
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;
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Main16:
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OneTimeCall EarlyInit16
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;
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; Transition the processor from 16-bit real mode to 32-bit flat mode
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;
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OneTimeCall TransitionFromReal16To32BitFlat
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BITS 32
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; Clear the WorkArea header. The SEV probe routines will populate the
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; work area when detected.
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mov byte[WORK_AREA_GUEST_TYPE], 0
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;
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; Search for the Boot Firmware Volume (BFV)
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;
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OneTimeCall Flat32SearchForBfvBase
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;
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; EBP - Start of BFV
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;
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;
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; Search for the SEC entry point
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;
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OneTimeCall Flat32SearchForSecEntryPoint
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;
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; ESI - SEC Core entry point
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; EBP - Start of BFV
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;
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%ifdef ARCH_IA32
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;
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; Restore initial EAX value into the EAX register
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;
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mov eax, esp
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;
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; Jump to the 32-bit SEC entry point
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;
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jmp esi
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%else
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;
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; Transition the processor from 32-bit flat mode to 64-bit flat mode
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;
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OneTimeCall Transition32FlatTo64Flat
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BITS 64
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;
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; Some values were calculated in 32-bit mode. Make sure the upper
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; 32-bits of 64-bit registers are zero for these values.
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;
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mov rax, 0x00000000ffffffff
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and rsi, rax
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and rbp, rax
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and rsp, rax
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;
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; RSI - SEC Core entry point
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; RBP - Start of BFV
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;
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;
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; Restore initial EAX value into the RAX register
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;
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mov rax, rsp
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;
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; Jump to the 64-bit SEC entry point
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;
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jmp rsi
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%endif
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