5aae0aa7d8
1) The entry point of PeiCore has been changed to EFI_PEI_CORE_ENTRY_POINT defined in PI. 2) Nt32, Tiger and lakeport platform's SecCore has been updated. 3) Autogen tools also has been updated. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@3804 6f19259b-4bc3-4df7-8a09-765794883524
53 lines
1.6 KiB
ArmAsm
53 lines
1.6 KiB
ArmAsm
/// @file
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/// IPF specific SwitchStack() function
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///
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/// Copyright (c) 2006, Intel Corporation
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/// All rights reserved. This program and the accompanying materials
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/// are licensed and made available under the terms and conditions of the BSD License
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/// which accompanies this distribution. The full text of the license may be found at
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/// http://opensource.org/licenses/bsd-license.php
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///
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/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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///
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/// Module Name: SwitchStack.s
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///
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///
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.auto
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.text
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.proc IpfAsmSwitchStack
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.type IpfAsmSwitchStack, @function
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.regstk 6, 0, 0, 0
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IpfAsmSwitchStack::
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mov r14 = ar.rsc
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movl r2 = ~((((1 << 14) - 1) << 16) | 3)
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mov r17 = in1
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mov r18 = in2
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mov r19 = in3
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and r2 = r14, r2
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mov ar.rsc = r2
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mov sp = in4
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mov r20 = in5
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ld8.nt1 r16 = [in0], 8
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ld8.nta gp = [in0]
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mov r3 = -1
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loadrs
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mov ar.bspstore = r20
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mov b7 = r16
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alloc r2 = ar.pfs, 0, 0, 3, 0
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mov out0 = r17
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mov out1 = r18
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mov out2 = r19
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mov ar.rnat = r3
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mov ar.rsc = r14
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br.call.sptk.many b0 = b7
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.endp IpfAsmSwitchStack
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