793ca69f50
The support for GIcV2 was already existing. This change separate the GicV2 specific functions from the common Gic code (in preparation for GicV3 support). Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15626 6f19259b-4bc3-4df7-8a09-765794883524
67 lines
1.9 KiB
C
67 lines
1.9 KiB
C
/** @file
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*
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* Copyright (c) 2011-2014, ARM Limited. All rights reserved.
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*
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* This program and the accompanying materials
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* are licensed and made available under the terms and conditions of the BSD License
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* which accompanies this distribution. The full text of the license may be found at
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* http://opensource.org/licenses/bsd-license.php
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*
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* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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*
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**/
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#include <Base.h>
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#include <Library/DebugLib.h>
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#include <Library/IoLib.h>
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#include <Library/ArmGicLib.h>
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#include "GicV2/ArmGicV2Lib.h"
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/*
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* This function configures the interrupts set by the mask to be secure.
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*
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*/
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VOID
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EFIAPI
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ArmGicSetSecureInterrupts (
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IN UINTN GicDistributorBase,
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IN UINTN* GicSecureInterruptMask,
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IN UINTN GicSecureInterruptMaskSize
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)
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{
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UINTN Index;
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UINT32 InterruptStatus;
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// We must not have more interrupts defined by the mask than the number of available interrupts
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ASSERT(GicSecureInterruptMaskSize <= (ArmGicGetMaxNumInterrupts (GicDistributorBase) / 32));
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// Set all the interrupts defined by the mask as Secure
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for (Index = 0; Index < GicSecureInterruptMaskSize; Index++) {
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InterruptStatus = MmioRead32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4));
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MmioWrite32 (GicDistributorBase + ARM_GIC_ICDISR + (Index * 4), InterruptStatus & (~GicSecureInterruptMask[Index]));
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}
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}
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VOID
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EFIAPI
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ArmGicEnableDistributor (
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IN INTN GicDistributorBase
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)
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{
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// Turn on the GIC distributor
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MmioWrite32 (GicDistributorBase + ARM_GIC_ICDDCR, 1);
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}
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VOID
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EFIAPI
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ArmGicSetupNonSecure (
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IN UINTN MpId,
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IN INTN GicDistributorBase,
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IN INTN GicInterruptInterfaceBase
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)
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{
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ArmGicV2SetupNonSecure (MpId, GicDistributorBase, GicInterruptInterfaceBase);
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}
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