b4e53e389d
The SMC helper functions were buggy as they were assuming that the values in x1-x7 registers were preserved across an SMC call, which is not the case. This patch fixes this issue. It also simplifies the code by providing only 1 version of the SMC helper function. We used to have 4 versions depending on the number of arguments. The problem with this approach was that the number of arguments also dictated the number of return values, which is completely unrelated. E.g. you can have an SMC call that takes 1 argument but returns 4 values. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15748 6f19259b-4bc3-4df7-8a09-765794883524
53 lines
1.4 KiB
ArmAsm
53 lines
1.4 KiB
ArmAsm
//
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// Copyright (c) 2012-2014, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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.text
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.align 3
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.arch_extension sec
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GCC_ASM_EXPORT(ArmCallSmc)
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ASM_PFX(ArmCallSmc):
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push {r4-r8}
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// r0 will be popped just after the SMC call
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push {r0}
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// Load the SMC arguments values into the appropriate registers
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ldr r7, [r0, #28]
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ldr r6, [r0, #24]
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ldr r5, [r0, #20]
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ldr r4, [r0, #16]
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ldr r3, [r0, #12]
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ldr r2, [r0, #8]
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ldr r1, [r0, #4]
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ldr r0, [r0, #0]
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smc #0
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// Pop the ARM_SMC_ARGS structure address from the stack into r8
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pop {r8}
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// Load the SMC returned values into the appropriate registers
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// A SMC call can return up to 4 values - we do not need to store back r4-r7.
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str r3, [r8, #12]
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str r2, [r8, #8]
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str r1, [r8, #4]
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str r0, [r8, #0]
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mov r0, r8
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// Restore the registers r4-r8
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pop {r4-r8}
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bx lr
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