25402f5d06
Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Harry Liebel <Harry.Liebel@arm.com> Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14486 6f19259b-4bc3-4df7-8a09-765794883524
94 lines
1.9 KiB
ArmAsm
94 lines
1.9 KiB
ArmAsm
#------------------------------------------------------------------------------
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#
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# Copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#------------------------------------------------------------------------------
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GCC_ASM_EXPORT(DebugAgentVectorTable)
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GCC_ASM_IMPORT(DefaultExceptionHandler)
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.text
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ASM_PFX(DebugAgentVectorTable):
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//
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// Current EL with SP0 : 0x0 - 0x180
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//
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.align 11
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ASM_PFX(SynchronousExceptionSP0):
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b ASM_PFX(SynchronousExceptionSP0)
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.align 7
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ASM_PFX(IrqSP0):
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b ASM_PFX(IrqSP0)
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.align 7
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ASM_PFX(FiqSP0):
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b ASM_PFX(FiqSP0)
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.align 7
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ASM_PFX(SErrorSP0):
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b ASM_PFX(SErrorSP0)
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//
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// Current EL with SPx: 0x200 - 0x380
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//
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.align 7
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ASM_PFX(SynchronousExceptionSPx):
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b ASM_PFX(SynchronousExceptionSPx)
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.align 7
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ASM_PFX(IrqSPx):
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b ASM_PFX(IrqSPx)
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.align 7
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ASM_PFX(FiqSPx):
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b ASM_PFX(FiqSPx)
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.align 7
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ASM_PFX(SErrorSPx):
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b ASM_PFX(SErrorSPx)
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/* Lower EL using AArch64 : 0x400 - 0x580 */
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.align 7
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ASM_PFX(SynchronousExceptionA64):
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b ASM_PFX(SynchronousExceptionA64)
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.align 7
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ASM_PFX(IrqA64):
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b ASM_PFX(IrqA64)
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.align 7
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ASM_PFX(FiqA64):
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b ASM_PFX(FiqA64)
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.align 7
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ASM_PFX(SErrorA64):
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b ASM_PFX(SErrorA64)
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//
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// Lower EL using AArch32 : 0x0 - 0x180
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//
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.align 7
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ASM_PFX(SynchronousExceptionA32):
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b ASM_PFX(SynchronousExceptionA32)
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.align 7
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ASM_PFX(IrqA32):
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b ASM_PFX(IrqA32)
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.align 7
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ASM_PFX(FiqA32):
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b ASM_PFX(FiqA32)
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.align 7
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ASM_PFX(SErrorA32):
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b ASM_PFX(SErrorA32)
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