a36d531f5d
This is an implementation of ArmPlatformLib that discovers the size of system DRAM from a device tree blob located at the address passed in gArmTokenSpaceGuid.PcdDeviceTreeBaseAddress, which should equal the value in gArmTokenSpaceGuid.PcdSystemMemoryBase. As the device tree blob is passed in system DRAM, this library can only be used if sufficient DRAM is available (>= 128 MB) and if not using shadowed NOR. The reason for this is that it makes it easier to guarantee that such a device tree blob at base of DRAM will not be clobbered before we get a chance to preserve it. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Michael Casadevall <michael.casadevall@linaro.org> Acked-by: Laszlo Ersek <lersek@redhat.com> Signed-off-by: Ard Biesheuvel <ard.biesheuvel@linaro.org> Signed-off-By: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@16138 6f19259b-4bc3-4df7-8a09-765794883524
87 lines
2.1 KiB
ArmAsm
87 lines
2.1 KiB
ArmAsm
#
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# Copyright (c) 2011-2013, ARM Limited. All rights reserved.
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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#
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#include <AsmMacroIoLibV8.h>
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#include <Base.h>
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#include <Library/ArmLib.h>
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#include <Library/PcdLib.h>
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#include <AutoGen.h>
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.text
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.align 2
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GCC_ASM_EXPORT(ArmPlatformPeiBootAction)
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GCC_ASM_EXPORT(ArmPlatformIsPrimaryCore)
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GCC_ASM_EXPORT(ArmPlatformGetPrimaryCoreMpId)
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GCC_ASM_EXPORT(ArmPlatformGetCorePosition)
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GCC_ASM_EXPORT(ArmGetPhysAddrTop)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCore)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdArmPrimaryCoreMask)
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GCC_ASM_IMPORT(_gPcd_FixedAtBuild_PcdCoreCount)
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ASM_PFX(ArmPlatformPeiBootAction):
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ret
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//UINTN
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//ArmPlatformGetPrimaryCoreMpId (
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// VOID
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// );
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ASM_PFX(ArmPlatformGetPrimaryCoreMpId):
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdArmPrimaryCore, x0)
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ldrh w0, [x0]
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ret
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//UINTN
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//ArmPlatformIsPrimaryCore (
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// IN UINTN MpId
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// );
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ASM_PFX(ArmPlatformIsPrimaryCore):
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mov x0, #1
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ret
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//UINTN
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//ArmPlatformGetCorePosition (
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// IN UINTN MpId
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// );
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// With this function: CorePos = (ClusterId * 4) + CoreId
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ASM_PFX(ArmPlatformGetCorePosition):
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and x1, x0, #ARM_CORE_MASK
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and x0, x0, #ARM_CLUSTER_MASK
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add x0, x1, x0, LSR #6
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ret
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//EFI_PHYSICAL_ADDRESS
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//GetPhysAddrTop (
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// VOID
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// );
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ASM_PFX(ArmGetPhysAddrTop):
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mrs x0, id_aa64mmfr0_el1
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adr x1, .LPARanges
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and x0, x0, #7
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ldrb w1, [x1, x0]
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mov x0, #1
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lsl x0, x0, x1
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ret
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//
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// Bits 0..2 of the AA64MFR0_EL1 system register encode the size of the
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// physical address space support on this CPU:
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// 0 == 32 bits, 1 == 36 bits, etc etc
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// 6 and 7 are reserved
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//
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.LPARanges:
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.byte 32, 36, 40, 42, 44, 48, -1, -1
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ASM_FUNCTION_REMOVE_IF_UNREFERENCED
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