Now, Transition32FlatTo64Flat calls SetCr3ForPageTables64 which is located in Ia32/PageTables64.asm. This change is required so OVMF can replace the code in Ia32/PageTables64.asm with code that generates page tables in RAM. Note: Since this change does not impact the functionality of the current VTF0 binaries, they are not being updated. The resulting new binaries were tested to verify there is no regression. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Jordan Justen <jordan.l.justen@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com> Tested-by: Laszlo Ersek <lersek@redhat.com> Reviewed-by: Jeff Fan <jeff.fan@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14714 6f19259b-4bc3-4df7-8a09-765794883524
46 lines
1.4 KiB
NASM
46 lines
1.4 KiB
NASM
;------------------------------------------------------------------------------
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; @file
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; Transition from 32 bit flat protected mode into 64 bit flat protected mode
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;
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; Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved.<BR>
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; This program and the accompanying materials
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; are licensed and made available under the terms and conditions of the BSD License
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; which accompanies this distribution. The full text of the license may be found at
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; http://opensource.org/licenses/bsd-license.php
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;
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; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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;
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;------------------------------------------------------------------------------
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BITS 32
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;
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; Modified: EAX
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;
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Transition32FlatTo64Flat:
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OneTimeCall SetCr3ForPageTables64
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mov eax, cr4
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bts eax, 5 ; enable PAE
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mov cr4, eax
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mov ecx, 0xc0000080
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rdmsr
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bts eax, 8 ; set LME
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wrmsr
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mov eax, cr0
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bts eax, 31 ; set PG
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mov cr0, eax ; enable paging
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jmp LINEAR_CODE64_SEL:ADDR_OF(jumpTo64BitAndLandHere)
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BITS 64
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jumpTo64BitAndLandHere:
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debugShowPostCode POSTCODE_64BIT_MODE
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OneTimeCallRet Transition32FlatTo64Flat
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