https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Liming Gao <liming.gao@intel.com>
49 lines
1.4 KiB
C
49 lines
1.4 KiB
C
/** @file
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Registers definition for Intel QuarkNcSocId.
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Copyright (c) 2013-2015 Intel Corporation.
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __INTEL_QNC_REGS_H__
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#define __INTEL_QNC_REGS_H__
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#include <QNCAccess.h>
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//
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// PCI HostBridge Segment number
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//
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#define QNC_PCI_HOST_BRIDGE_SEGMENT_NUMBER 0
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//
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// PCI RootBridge resource allocation's attribute
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//
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#define QNC_PCI_ROOT_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTE \
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EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM
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//
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// PCI HostBridge resource appeture
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//
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#define QNC_PCI_HOST_BRIDGE_RESOURCE_APPETURE_BUSBASE 0x0
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#define QNC_PCI_HOST_BRIDGE_RESOURCE_APPETURE_BUSLIMIT 0xff
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#define QNC_PCI_HOST_BRIDGE_RESOURCE_APPETURE_TSEG_SIZE 0x10000000
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//
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// PCI RootBridge configure port
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//
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#define QNC_PCI_ROOT_BRIDGE_CONFIGURATION_ADDRESS_PORT 0xCF8
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#define QNC_PCI_ROOT_BRIDGE_CONFIGURATION_DATA_PORT 0xCFC
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//
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// PCI Rootbridge's support feature
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//
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#define QNC_PCI_ROOT_BRIDGE_SUPPORTED (EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO | \
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EFI_PCI_ATTRIBUTE_ISA_IO | \
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EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO | \
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EFI_PCI_ATTRIBUTE_VGA_MEMORY | \
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EFI_PCI_ATTRIBUTE_VGA_IO)
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#endif // __INTEL_QNC_REGS_H__
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