5c7c41f81d
There are two FSP images at different locations in a flash (one factory version is read only and other in updatable version) TempRamInit, FspMemoryInit and TempRamExit are executed from factory version and FspSiliconInit/NotifyPhase will be executed from updatable version. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: "Ma, Maurice" <maurice.ma@intel.com> Reviewed-by: "Yao, Jiewen" <Jiewen.Yao@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@17249 6f19259b-4bc3-4df7-8a09-765794883524
110 lines
5.1 KiB
Plaintext
110 lines
5.1 KiB
Plaintext
## @file
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# Provides drivers and definitions to support fsp in EDKII bios.
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#
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# Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials are licensed and made available under
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# the terms and conditions of the BSD License that accompanies this distribution.
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# The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php.
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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##
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[Defines]
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DEC_SPECIFICATION = 0x00010005
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PACKAGE_NAME = IntelFspWrapperPkg
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PACKAGE_GUID = 99101BB6-6DE1-4537-85A3-FD6B594F7468
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PACKAGE_VERSION = 0.1
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[Includes]
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Include
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[LibraryClasses]
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## @libraryclass Provide FSP API related function.
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FspApiLib|Include/Library/FspApiLib.h
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## @libraryclass Provide FSP hob process related function.
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FspHobProcessLib|Include/Library/FspHobProcessLib.h
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## @libraryclass Provide FSP platform information related function.
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FspPlatformInfoLib|Include/Library/FspPlatformInfoLib.h
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## @libraryclass Provide FSP wrapper platform sec related function.
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FspPlatformSecLib|Include/Library/FspPlatformSecLib.h
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[Guids]
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#
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# GUID defined in package
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#
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gFspWrapperTokenSpaceGuid = {0x2bc1c74a, 0x122f, 0x40b2, { 0xb2, 0x23, 0x8, 0x2b, 0x74, 0x65, 0x22, 0x5d } }
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[Ppis]
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gFspInitDonePpiGuid = { 0xf5ef05e4, 0xd538, 0x4774, { 0x8f, 0x1b, 0xe9, 0x77, 0x30, 0x11, 0xe0, 0x38 } }
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gTopOfTemporaryRamPpiGuid = { 0x2f3962b2, 0x57c5, 0x44ec, { 0x9e, 0xfc, 0xa6, 0x9f, 0xd3, 0x02, 0x03, 0x2b } }
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[Protocols]
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################################################################################
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#
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# PCD Declarations section - list of all PCDs Declared by this Package
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# Only this package should be providing the
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# declaration, other packages should not.
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#
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################################################################################
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[PcdsFixedAtBuild, PcdsPatchableInModule]
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## Provides the memory mapped base address of the BIOS CodeCache Flash Device.
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gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheAddress|0xFFE00000|UINT32|0x10000001
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## Provides the size of the BIOS Flash Device.
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gFspWrapperTokenSpaceGuid.PcdFlashCodeCacheSize|0x00200000|UINT32|0x10000002
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## Indicates the base address of the factory FSP binary.
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gFspWrapperTokenSpaceGuid.PcdFlashFvFspBase|0xFFF80000|UINT32|0x10000003
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## Indicates the base address of the updatable FSP binary to support Dual FSP.
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# There could be two FSP images at different locations in a flash -
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# one factory version (default) and updatable version (updatable).
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# TempRamInit, FspMemoryInit and TempRamExit are always executed from factory version.
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# FspSiliconInit and NotifyPhase can be executed from updatable version if it is available,
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# FspSiliconInit and NotifyPhase are executed from factory version if there is no updateable version,
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# PcdFlashFvFspBase is base address of factory FSP, and PcdFlashFvSecondFspBase
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# is base address of updatable FSP. If PcdFlashFvSecondFspBase is 0, that means
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# there is no updatable FSP.
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gFspWrapperTokenSpaceGuid.PcdFlashFvSecondFspBase|0x00000000|UINT32|0x10000008
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## Provides the size of the factory FSP binary.
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gFspWrapperTokenSpaceGuid.PcdFlashFvFspSize|0x00048000|UINT32|0x10000004
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## Provides the size of the updatable FSP binary to support Dual FSP.
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gFspWrapperTokenSpaceGuid.PcdFlashFvSecondFspSize|0x00000000|UINT32|0x10000009
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## Indicates the base address of the first Microcode Patch in the Microcode Region
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gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchAddress|0x0|UINT64|0x10000005
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gFspWrapperTokenSpaceGuid.PcdCpuMicrocodePatchRegionSize|0x0|UINT64|0x10000006
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## Indicates the offset of the Cpu Microcode.
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gFspWrapperTokenSpaceGuid.PcdFlashMicroCodeOffset|0x90|UINT32|0x10000007
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##
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# Maximum number of Ppi is provided by SecCore.
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##
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gFspWrapperTokenSpaceGuid.PcdSecCoreMaxPpiSupported|0x6|UINT32|0x20000001
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# This is MAX UPD region size
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gFspWrapperTokenSpaceGuid.PcdMaxUpdRegionSize|0x200|UINT32|0x30000001
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## Stack size in the temporary RAM.
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# 0 means half of TemporaryRamSize.
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gFspWrapperTokenSpaceGuid.PcdPeiTemporaryRamStackSize|0|UINT32|0x40000001
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# This is temporary DRAM base and size for StackTop in FspInit
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gFspWrapperTokenSpaceGuid.PcdTemporaryRamBase|0x00080000|UINT32|0x40000002
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gFspWrapperTokenSpaceGuid.PcdTemporaryRamSize|0x00010000|UINT32|0x40000003
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## Indicate the PEI memory size platform want to report
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gFspWrapperTokenSpaceGuid.PcdPeiMinMemSize|0x1800000|UINT32|0x40000004
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## Indicate the PEI memory size platform want to report
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gFspWrapperTokenSpaceGuid.PcdPeiRecoveryMinMemSize|0x3000000|UINT32|0x40000005
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## PcdFspApiVersion is to determine wrapper calling mechanism
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# - FSP_API_REVISION_1 1
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# - FSP_API_REVISION_2 2
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gFspWrapperTokenSpaceGuid.PcdFspApiVersion|0x02|UINT8|0x00001000
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