b26f0cf9ee
https://bugzilla.tianocore.org/show_bug.cgi?id=1373 Replace BSD 2-Clause License with BSD+Patent License. This change is based on the following emails: https://lists.01.org/pipermail/edk2-devel/2019-February/036260.html https://lists.01.org/pipermail/edk2-devel/2018-October/030385.html RFCs with detailed process for the license change: V3: https://lists.01.org/pipermail/edk2-devel/2019-March/038116.html V2: https://lists.01.org/pipermail/edk2-devel/2019-March/037669.html V1: https://lists.01.org/pipermail/edk2-devel/2019-March/037500.html Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Michael D Kinney <michael.d.kinney@intel.com> Reviewed-by: Laszlo Ersek <lersek@redhat.com>
41 lines
857 B
C
41 lines
857 B
C
/** @file
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OVMF Platform definitions
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Copyright (C) 2015, Red Hat, Inc.
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Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef __OVMF_PLATFORMS_H__
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#define __OVMF_PLATFORMS_H__
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#include <Library/PciLib.h>
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#include <IndustryStandard/Pci22.h>
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#include <IndustryStandard/Q35MchIch9.h>
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#include <IndustryStandard/I440FxPiix4.h>
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//
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// OVMF Host Bridge DID Address
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//
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#define OVMF_HOSTBRIDGE_DID \
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PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)
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//
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// Values we program into the PM base address registers
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//
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#define PIIX4_PMBA_VALUE 0xB000
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#define ICH9_PMBASE_VALUE 0x0600
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//
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// Common bits in same-purpose registers
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//
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#define PMBA_RTE BIT0
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//
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// Common IO ports relative to the Power Management Base Address
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//
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#define ACPI_TIMER_OFFSET 0x8
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#endif
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