75839f977d
Now that the SMRAM at the default SMBASE is honored everywhere necessary, implement the actual detection. The (simple) steps are described in previous patch "OvmfPkg/IndustryStandard: add MCH_DEFAULT_SMBASE* register macros". Regarding CSM_ENABLE builds: according to the discussion with Jiewen at https://edk2.groups.io/g/devel/message/48082 http://mid.mail-archive.com/74D8A39837DF1E4DA445A8C0B3885C503F7C9D2F@shsmsx102.ccr.corp.intel.com if the platform has SMRAM at the default SMBASE, then we have to (a) either punch a hole in the legacy E820 map as well, in LegacyBiosBuildE820() [OvmfPkg/Csm/LegacyBiosDxe/LegacyBootSupport.c], (b) or document, or programmatically catch, the incompatibility between the "SMRAM at default SMBASE" and "CSM" features. Because CSM is out of scope for the larger "VCPU hotplug with SMM" feature, option (b) applies. Therefore, if the CSM is enabled in the OVMF build, then PlatformPei will not attempt to detect SMRAM at the default SMBASE, at all. This is approach (4) -- the most flexible one, for end-users -- from: http://mid.mail-archive.com/868dcff2-ecaa-e1c6-f018-abe7087d640c@redhat.com https://edk2.groups.io/g/devel/message/48348 Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Ref: https://bugzilla.tianocore.org/show_bug.cgi?id=1512 Signed-off-by: Laszlo Ersek <lersek@redhat.com> Message-Id: <20200129214412.2361-12-lersek@redhat.com> Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
119 lines
3.6 KiB
INI
119 lines
3.6 KiB
INI
## @file
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# Platform PEI driver
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#
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# This module provides platform specific function to detect boot mode.
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# Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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[Defines]
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INF_VERSION = 0x00010005
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BASE_NAME = PlatformPei
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FILE_GUID = 222c386d-5abc-4fb4-b124-fbb82488acf4
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MODULE_TYPE = PEIM
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VERSION_STRING = 1.0
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ENTRY_POINT = InitializePlatform
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#
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# The following information is for reference only and not required by the build tools.
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#
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# VALID_ARCHITECTURES = IA32 X64 EBC
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#
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[Sources]
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AmdSev.c
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ClearCache.c
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Cmos.c
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Cmos.h
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FeatureControl.c
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Fv.c
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MemDetect.c
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Platform.c
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Platform.h
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Xen.c
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Xen.h
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[Packages]
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MdePkg/MdePkg.dec
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MdeModulePkg/MdeModulePkg.dec
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SecurityPkg/SecurityPkg.dec
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UefiCpuPkg/UefiCpuPkg.dec
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OvmfPkg/OvmfPkg.dec
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[Guids]
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gEfiMemoryTypeInformationGuid
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gEfiXenInfoGuid
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[LibraryClasses]
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BaseLib
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CacheMaintenanceLib
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DebugLib
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HobLib
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IoLib
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PciLib
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ResourcePublicationLib
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PeiServicesLib
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PeiServicesTablePointerLib
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PeimEntryPoint
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QemuFwCfgLib
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QemuFwCfgS3Lib
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MtrrLib
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MemEncryptSevLib
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PcdLib
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[Pcd]
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfPeiMemFvSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDxeMemFvSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPageTablesSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageBase
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfLockBoxStorageSize
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gUefiOvmfPkgTokenSpaceGuid.PcdGuidedExtractHandlerTableSize
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfHostBridgePciDevId
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gUefiOvmfPkgTokenSpaceGuid.PcdPciIoBase
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gUefiOvmfPkgTokenSpaceGuid.PcdPciIoSize
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Base
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio32Size
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Base
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gUefiOvmfPkgTokenSpaceGuid.PcdPciMmio64Size
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gUefiOvmfPkgTokenSpaceGuid.PcdOvmfDecompressionScratchEnd
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gUefiOvmfPkgTokenSpaceGuid.PcdQ35TsegMbytes
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gUefiOvmfPkgTokenSpaceGuid.PcdQ35SmramAtDefaultSmbase
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gEfiMdePkgTokenSpaceGuid.PcdGuidedExtractHandlerTableAddress
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize
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gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize
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gEfiMdeModulePkgTokenSpaceGuid.PcdEmuVariableNvStoreReserved
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gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration
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gEfiMdeModulePkgTokenSpaceGuid.PcdDxeIplSwitchToLongMode
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gEfiMdeModulePkgTokenSpaceGuid.PcdUse1GPageTable
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gEfiMdeModulePkgTokenSpaceGuid.PcdSetNxForStack
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gEfiMdeModulePkgTokenSpaceGuid.PcdPropertiesTableEnable
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gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiS3Enable
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gEfiMdeModulePkgTokenSpaceGuid.PcdPteMemoryEncryptionAddressOrMask
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gEfiSecurityPkgTokenSpaceGuid.PcdOptionRomImageVerificationPolicy
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gUefiCpuPkgTokenSpaceGuid.PcdCpuLocalApicBaseAddress
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gUefiCpuPkgTokenSpaceGuid.PcdCpuMaxLogicalProcessorNumber
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gUefiCpuPkgTokenSpaceGuid.PcdCpuBootLogicalProcessorNumber
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gUefiCpuPkgTokenSpaceGuid.PcdCpuApStackSize
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[FixedPcd]
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gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress
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[FeaturePcd]
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gUefiOvmfPkgTokenSpaceGuid.PcdCsmEnable
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gUefiOvmfPkgTokenSpaceGuid.PcdSmmSmramRequire
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[Ppis]
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gEfiPeiMasterBootModePpiGuid
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gEfiPeiMpServicesPpiGuid
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[Depex]
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TRUE
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