e366a41ef0
The GIC CPU Interface (GICC) structure is part of the Multiple APIC Description Table (MADT) that describes the interrupt model for the platform. The MADT table is a mandatory table required for booting a standards-based operating system. Arm requires the GIC interrupt model, in which the logical processors are required to have a Processor Device object in the DSDT, and must convey each processor's GIC information to the OS using the GICC structure. The CPU and GIC information is described in the platform Device Tree, the bindings for which can be found at: - linux/Documentation/devicetree/bindings/arm/cpus.yaml - linux/Documentation/devicetree/bindings/interrupt-controller/ arm,gic.yaml - linux/Documentation/devicetree/bindings/interrupt-controller/ arm,gic-v3.yaml The FdtHwInfoParser implements a GIC CPU Interface Parser that parses the platform Device Tree to create CM_ARM_GICC_INFO objects which are encapsulated in a Configuration Manager descriptor object and added to the platform information repository. The platform Configuration Manager can then utilise this information when generating the MADT and the SSDT CPU information tables. Signed-off-by: Pierre Gondois <Pierre.Gondois@arm.com> Reviewed-by: Sami Mujawar <sami.mujawar@arm.com>
68 lines
2.7 KiB
C
68 lines
2.7 KiB
C
/** @file
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Arm Gic cpu parser.
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Copyright (c) 2021, ARM Limited. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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@par Reference(s):
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- linux/Documentation/devicetree/bindings/interrupt-controller/arm,gic.yaml
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- linux/Documentation/devicetree/bindings/interrupt-controller/arm,gic-v3.yaml
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**/
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#ifndef ARM_GICC_PARSER_H_
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#define ARM_GICC_PARSER_H_
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/** CM_ARM_GICC_INFO parser function.
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This parser expects FdtBranch to be the "\cpus" node node.
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At most one CmObj is created.
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The following structure is populated:
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typedef struct CmArmGicCInfo {
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UINT32 CPUInterfaceNumber; // {Populated}
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UINT32 AcpiProcessorUid; // {Populated}
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UINT32 Flags; // {Populated}
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UINT32 ParkingProtocolVersion; // {default = 0}
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UINT32 PerformanceInterruptGsiv; // {default = 0}
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UINT64 ParkedAddress; // {default = 0}
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UINT64 PhysicalBaseAddress; // {Populated}
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UINT64 GICV; // {Populated}
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UINT64 GICH; // {Populated}
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UINT32 VGICMaintenanceInterrupt; // {Populated}
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UINT64 GICRBaseAddress; // {default = 0}
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UINT64 MPIDR; // {Populated}
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UINT8 ProcessorPowerEfficiencyClass; // {default = 0}
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UINT16 SpeOverflowInterrupt; // {default = 0}
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UINT32 ProximityDomain; // {default = 0}
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UINT32 ClockDomain; // {default = 0}
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UINT32 AffinityFlags; // {default = 0}
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} CM_ARM_GICC_INFO;
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The pmu information can be found in the pmu node. There is no support
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for now.
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A parser parses a Device Tree to populate a specific CmObj type. None,
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one or many CmObj can be created by the parser.
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The created CmObj are then handed to the parser's caller through the
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HW_INFO_ADD_OBJECT interface.
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This can also be a dispatcher. I.e. a function that not parsing a
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Device Tree but calling other parsers.
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@param [in] FdtParserHandle A handle to the parser instance.
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@param [in] FdtBranch When searching for DT node name, restrict
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the search to this Device Tree branch.
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@retval EFI_SUCCESS The function completed successfully.
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@retval EFI_ABORTED An error occurred.
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@retval EFI_INVALID_PARAMETER Invalid parameter.
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@retval EFI_NOT_FOUND Not found.
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@retval EFI_UNSUPPORTED Unsupported.
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**/
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EFI_STATUS
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EFIAPI
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ArmGicCInfoParser (
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IN CONST FDT_HW_INFO_PARSER_HANDLE FdtParserHandle,
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IN INT32 FdtBranch
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);
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#endif // ARM_GICC_PARSER_H_
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