bae5ddc057
1. Update fdf and dsc to use SerialDxe in MdeModulePkg. 2. Separate the code that gets SerialRegBase and SerialRegAccessType by CbParseLib from CorebootPayloadPkg/Library/SerialPortLib to PlatformHookLib, and then leverage BaseSerialPortLib16550 in MdeModulePkg. 3. Remove CorebootPayloadPkg/SerialDxe and CorebootPayloadPkg/Library/SerialPortLib. Cc: Michael D Kinney <michael.d.kinney@intel.com> Cc: Liming Gao <liming.gao@intel.com> Cc: Maurice Ma <maurice.ma@intel.com> Cc: Prince Agyeman <prince.agyeman@intel.com> Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Star Zeng <star.zeng@intel.com> Reviewed-by: Maurice Ma <maurice.ma@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@18968 6f19259b-4bc3-4df7-8a09-765794883524
162 lines
4.2 KiB
C
162 lines
4.2 KiB
C
/** @file
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Head file for BDS Platform specific code
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Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
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#define _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
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#include <PiDxe.h>
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#include <IndustryStandard/Pci.h>
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#include <Library/DebugLib.h>
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#include <Library/BaseMemoryLib.h>
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#include <Library/UefiBootServicesTableLib.h>
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#include <Library/MemoryAllocationLib.h>
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#include <Library/BaseLib.h>
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#include <Library/PcdLib.h>
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#include <Library/GenericBdsLib.h>
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#include <Library/PlatformBdsLib.h>
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#include <Library/UefiLib.h>
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#include <Library/DevicePathLib.h>
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#include <Protocol/PciIo.h>
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#include <Guid/GlobalVariable.h>
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extern BDS_CONSOLE_CONNECT_ENTRY gPlatformConsole[];
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extern EFI_DEVICE_PATH_PROTOCOL *gPlatformConnectSequence[];
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extern EFI_DEVICE_PATH_PROTOCOL *gPlatformDriverOption[];
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extern EFI_DEVICE_PATH_PROTOCOL *gPlatformRootBridges[];
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extern ACPI_HID_DEVICE_PATH gPnp16550ComPortDeviceNode;
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extern UART_DEVICE_PATH gUartDeviceNode;
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extern VENDOR_DEVICE_PATH gTerminalTypeDeviceNode;
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extern VENDOR_DEVICE_PATH gUartDeviceVenderNode;
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//
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//
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//
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#define VarConsoleInpDev L"ConInDev"
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#define VarConsoleInp L"ConIn"
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#define VarConsoleOutDev L"ConOutDev"
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#define VarConsoleOut L"ConOut"
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#define VarErrorOutDev L"ErrOutDev"
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#define VarErrorOut L"ErrOut"
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#define PCI_DEVICE_PATH_NODE(Func, Dev) \
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{ \
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{ \
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HARDWARE_DEVICE_PATH, \
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HW_PCI_DP, \
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{ \
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(UINT8) (sizeof (PCI_DEVICE_PATH)), \
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(UINT8) ((sizeof (PCI_DEVICE_PATH)) >> 8) \
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} \
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}, \
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(Func), \
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(Dev) \
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}
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#define PNPID_DEVICE_PATH_NODE(PnpId) \
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{ \
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{ \
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ACPI_DEVICE_PATH, \
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ACPI_DP, \
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{ \
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(UINT8) (sizeof (ACPI_HID_DEVICE_PATH)), \
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(UINT8) ((sizeof (ACPI_HID_DEVICE_PATH)) >> 8) \
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}, \
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}, \
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EISA_PNP_ID((PnpId)), \
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0 \
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}
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#define gPciRootBridge \
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PNPID_DEVICE_PATH_NODE(0x0A03)
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#define gPnp16550ComPort \
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PNPID_DEVICE_PATH_NODE(0x0501)
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#define gUartVender \
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{ \
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{ \
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HARDWARE_DEVICE_PATH, \
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HW_VENDOR_DP, \
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{ \
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(UINT8) (sizeof (VENDOR_DEVICE_PATH)), \
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(UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \
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} \
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}, \
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{0xD3987D4B, 0x971A, 0x435F, {0x8C, 0xAF, 0x49, 0x67, 0xEB, 0x62, 0x72, 0x41}} \
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}
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#define gUart \
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{ \
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{ \
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MESSAGING_DEVICE_PATH, \
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MSG_UART_DP, \
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{ \
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(UINT8) (sizeof (UART_DEVICE_PATH)), \
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(UINT8) ((sizeof (UART_DEVICE_PATH)) >> 8) \
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} \
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}, \
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0, \
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115200, \
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8, \
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1, \
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1 \
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}
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#define gPcAnsiTerminal \
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{ \
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{ \
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MESSAGING_DEVICE_PATH, \
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MSG_VENDOR_DP, \
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{ \
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(UINT8) (sizeof (VENDOR_DEVICE_PATH)), \
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(UINT8) ((sizeof (VENDOR_DEVICE_PATH)) >> 8) \
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} \
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}, \
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DEVICE_PATH_MESSAGING_PC_ANSI \
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}
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#define gEndEntire \
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{ \
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END_DEVICE_PATH_TYPE, \
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END_ENTIRE_DEVICE_PATH_SUBTYPE, \
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{ \
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END_DEVICE_PATH_LENGTH, \
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0 \
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} \
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}
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#define PCI_CLASS_SCC 0x07
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#define PCI_SUBCLASS_SERIAL 0x00
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#define PCI_IF_16550 0x02
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#define IS_PCI_16550SERIAL(_p) IS_CLASS3 (_p, PCI_CLASS_SCC, PCI_SUBCLASS_SERIAL, PCI_IF_16550)
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#define IS_PCI_ISA_PDECODE(_p) IS_CLASS3 (_p, PCI_CLASS_BRIDGE, PCI_CLASS_BRIDGE_ISA_PDECODE, 0)
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//
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// Platform Root Bridge
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//
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typedef struct {
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ACPI_HID_DEVICE_PATH PciRootBridge;
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EFI_DEVICE_PATH_PROTOCOL End;
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} PLATFORM_ROOT_BRIDGE_DEVICE_PATH;
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EFI_STATUS
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PlatformBdsNoConsoleAction (
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VOID
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);
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VOID
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PlatformBdsEnterFrontPage (
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IN UINT16 TimeoutDefault,
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IN BOOLEAN ConnectAllHappened
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);
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#endif // _PLATFORM_SPECIFIC_BDS_PLATFORM_H_
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