55a0cdb61c
CpuIo2Dxe only supports IO to access to CPU IO. Some ARCHs that do not implement ports for CPU IO require MMIO to access PCI IO, and they pretty much put the IO devices under the LPC bus, which is usually under the PCIe/PCI bus. CpuMmio2Dxe was added to meet these needs. CpuMmio2Dxe depends on PcdPciIoTranslation. The code is copied from ArmPkg. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Ray Ni <ray.ni@intel.com> Cc: Laszlo Ersek <lersek@redhat.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Leif Lindholm <quic_llindhol@quicinc.com> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Sami Mujawar <sami.mujawar@arm.com> Signed-off-by: Chao Li <lichao@loongson.cn> Reviewed-by: Ray Ni <ray.ni@intel.com>
19 lines
741 B
Plaintext
19 lines
741 B
Plaintext
// /** @file
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// Produces the CPU I/O 2 Protocol by using the services of the I/O Library.
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//
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// Produces the CPU I/O 2 Protocol by using the services of the I/O Library.
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//
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// Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>
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// Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>
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// Copyright (c) 2024 Loongson Technology Corporation Limited. All rights reserved.<BR>
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//
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// SPDX-License-Identifier: BSD-2-Clause-Patent
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//
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// **/
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#string STR_MODULE_ABSTRACT #language en-US "Produces the CPU I/O 2 Protocol by using the services of the I/O Library"
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#string STR_MODULE_DESCRIPTION #language en-US "Produces the CPU I/O 2 Protocol by using the services of the I/O Library."
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