772ec92577
Introduce a PCD to control the maximum SATP mode that MMU allowed to use. This PCD helps RISC-V platform set bare or minimum SATP mode during bring up to debug memory map issue. Signed-off-by: Tuan Phan <tphan@ventanamicro.com> Reviewed-by: Dhaval Sharma <dhaval@rivosinc.com> Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com> Reviewed-by: Sunil V L <sunilvl@ventanamicro.com>
31 lines
644 B
INI
31 lines
644 B
INI
## @file
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# RISC-V MMU library.
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#
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# Copyright (c) 2023, Ventana Micro Systems Inc. All Rights Reserved.<BR>
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#
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##
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[Defines]
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INF_VERSION = 0x0001001b
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BASE_NAME = BaseRiscVMmuLib
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FILE_GUID = d3bc42ee-c9eb-4339-ba11-06747083d3ae
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MODULE_TYPE = BASE
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VERSION_STRING = 1.0
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LIBRARY_CLASS = RiscVMmuLib
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[Sources]
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BaseRiscVMmuLib.c
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RiscVMmuCore.S
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[Packages]
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MdePkg/MdePkg.dec
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UefiCpuPkg/UefiCpuPkg.dec
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[LibraryClasses]
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BaseLib
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[Pcd]
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gUefiCpuPkgTokenSpaceGuid.PcdCpuRiscVMmuMaxSatpMode ## CONSUMES
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