ccbe2e9383
Cc: Eric Dong <eric.dong@intel.com> Cc: Rahul Kumar <rahul1.kumar@intel.com> Cc: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Yuanhao Xie <yuanhao.xie@intel.com> Message-Id: <20231007063203.936-1-yuanhao.xie@intel.com> Reviewed-by: Eric Dong <eric.dong@intel.com> Reviewed-by: Rahul R Kumar <rahul.r.kumar@intel.com>
51 lines
1.6 KiB
C
51 lines
1.6 KiB
C
/** @file
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Defines the HOB GUID, which is utilized for transferring essential
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information from the PEI to the DXE phase.
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Copyright (c) 2015 - 2023, Intel Corporation. All rights reserved.<BR>
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SPDX-License-Identifier: BSD-2-Clause-Patent
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**/
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#ifndef MP_HANDOFF_H_
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#define MP_HANDOFF_H_
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#define MP_HANDOFF_GUID \
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{ \
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0x11e2bd88, 0xed38, 0x4abd, {0xa3, 0x99, 0x21, 0xf2, 0x5f, 0xd0, 0x7a, 0x60 } \
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}
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extern EFI_GUID mMpHandOffGuid;
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//
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// The information required to transfer from the PEI phase to the
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// DXE phase is contained within the MP_HAND_OFF and PROCESSOR_HAND_OFF.
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// If the SizeOfPointer (WaitLoopExecutionMode) of both phases are equal,
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// and the APs is not in halt mode,
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// then the APs can be awakened by triggering the start-up
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// signal, rather than using INIT-SIPI-SIPI.
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// To trigger the start-up signal, BSP writes the specified
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// StartupSignalValue to the StartupSignalAddress of each processor.
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// This address is monitored by the APs.
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//
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typedef struct {
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UINT32 ApicId;
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UINT32 Health;
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UINT64 StartupSignalAddress;
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UINT64 StartupProcedureAddress;
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} PROCESSOR_HAND_OFF;
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typedef struct {
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//
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// The ProcessorIndex indicates the range of processors. If it is set to 0, it signifies
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// processors from 0 to CpuCount - 1. Multiple instances in the HOB list describe
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// processors from ProcessorIndex to ProcessorIndex + CpuCount - 1.
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//
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UINT32 ProcessorIndex;
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UINT32 CpuCount;
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UINT32 WaitLoopExecutionMode;
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UINT32 StartupSignalValue;
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PROCESSOR_HAND_OFF Info[];
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} MP_HAND_OFF;
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#endif
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