7f3b0bad4b
Some SdMmc host controllers are run by clocks with different
frequency than it is reflected in Capabilities Register 1.
It is allowed by SDHCI specification ver. 4.2 - if BaseClkFreq
field value of the Capability Register 1 is zero, the clock
frequency must be obtained via another method.
Because the bitfield is only 8 bits wide, a maximum value
that could be obtained from hardware is 255MHz.
In case the actual frequency exceeds 255MHz, the 8-bit BaseClkFreq
member of SD_MMC_HC_SLOT_CAP structure occurs to be not sufficient
to be used for setting the clock speed in SdMmcHcClockSupply
function.
This patch adds new UINT32 array ('BaseClkFreq[]') to
SD_MMC_HC_PRIVATE_DATA structure for specifying
the input clock speed for each slot of the host controller.
All routines that are used for clock configuration are
updated accordingly.
This patch also adds new IN OUT BaseClockFreq field
in the Capability callback of the SdMmcOverride,
protocol which allows to update BaseClkFreq value.
The patch reuses original commit from edk2-platforms:
20f6f144d3a8 ("Marvell/Drivers: XenonDxe: Allow overriding base clock
frequency")
Contributed-under: TianoCore Contribution Agreement 1.1
Signed-off-by: Marcin Wojtas <mw@semihalf.com>
Reviewed-by: Ard Biesheuvel <ard.biesheuvel@linaro.org>
Reviewed-by: Hao Wu <hao.a.wu@intel.com>
121 lines
3.7 KiB
C
121 lines
3.7 KiB
C
/** @file
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Protocol to describe overrides required to support non-standard SDHCI
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implementations
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Copyright (c) 2017 - 2018, Linaro, Ltd. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#ifndef __SD_MMC_OVERRIDE_H__
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#define __SD_MMC_OVERRIDE_H__
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#include <Protocol/SdMmcPassThru.h>
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#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_GUID \
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{ 0xeaf9e3c1, 0xc9cd, 0x46db, { 0xa5, 0xe5, 0x5a, 0x12, 0x4c, 0x83, 0x23, 0x23 } }
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#define EDKII_SD_MMC_OVERRIDE_PROTOCOL_VERSION 0x2
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typedef struct _EDKII_SD_MMC_OVERRIDE EDKII_SD_MMC_OVERRIDE;
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//
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// Bus timing modes
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//
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typedef enum {
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SdMmcUhsSdr12,
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SdMmcUhsSdr25,
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SdMmcUhsSdr50,
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SdMmcUhsSdr104,
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SdMmcUhsDdr50,
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SdMmcMmcLegacy,
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SdMmcMmcHsSdr,
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SdMmcMmcHsDdr,
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SdMmcMmcHs200,
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SdMmcMmcHs400,
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} SD_MMC_BUS_MODE;
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typedef enum {
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EdkiiSdMmcResetPre,
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EdkiiSdMmcResetPost,
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EdkiiSdMmcInitHostPre,
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EdkiiSdMmcInitHostPost,
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EdkiiSdMmcUhsSignaling,
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EdkiiSdMmcSwitchClockFreqPost,
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} EDKII_SD_MMC_PHASE_TYPE;
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/**
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Override function for SDHCI capability bits
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@param[in] ControllerHandle The EFI_HANDLE of the controller.
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@param[in] Slot The 0 based slot index.
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@param[in,out] SdMmcHcSlotCapability The SDHCI capability structure.
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@param[in,out] BaseClkFreq The base clock frequency value that
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optionally can be updated.
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@retval EFI_SUCCESS The override function completed successfully.
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@retval EFI_NOT_FOUND The specified controller or slot does not exist.
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@retval EFI_INVALID_PARAMETER SdMmcHcSlotCapability is NULL
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**/
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typedef
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EFI_STATUS
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(EFIAPI * EDKII_SD_MMC_CAPABILITY) (
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IN EFI_HANDLE ControllerHandle,
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IN UINT8 Slot,
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IN OUT VOID *SdMmcHcSlotCapability,
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IN OUT UINT32 *BaseClkFreq
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);
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/**
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Override function for SDHCI controller operations
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@param[in] ControllerHandle The EFI_HANDLE of the controller.
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@param[in] Slot The 0 based slot index.
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@param[in] PhaseType The type of operation and whether the
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hook is invoked right before (pre) or
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right after (post)
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@param[in,out] PhaseData The pointer to a phase-specific data.
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@retval EFI_SUCCESS The override function completed successfully.
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@retval EFI_NOT_FOUND The specified controller or slot does not exist.
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@retval EFI_INVALID_PARAMETER PhaseType is invalid
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**/
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typedef
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EFI_STATUS
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(EFIAPI * EDKII_SD_MMC_NOTIFY_PHASE) (
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IN EFI_HANDLE ControllerHandle,
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IN UINT8 Slot,
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IN EDKII_SD_MMC_PHASE_TYPE PhaseType,
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IN OUT VOID *PhaseData
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);
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struct _EDKII_SD_MMC_OVERRIDE {
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//
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// Protocol version of this implementation
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//
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UINTN Version;
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//
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// Callback to override SD/MMC host controller capability bits
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//
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EDKII_SD_MMC_CAPABILITY Capability;
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//
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// Callback to invoke SD/MMC override hooks
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//
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EDKII_SD_MMC_NOTIFY_PHASE NotifyPhase;
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};
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extern EFI_GUID gEdkiiSdMmcOverrideProtocolGuid;
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#endif
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