e7aac7fc13
Add support for EFI_MP_SERVICES_PROTOCOL during the DXE phase under AArch64. PSCI_CPU_ON is called to power on the core, the supplied procedure is executed and PSCI_CPU_OFF is called to power off the core. Fixes contributed by Ard Biesheuvel. Signed-off-by: Rebecca Cran <rebecca@quicinc.com> Reviewed-by: Ard Biesheuvel <ardb@kernel.org> Tested-by: Kun Qin <kun.qin@microsoft.com>
75 lines
2.0 KiB
ArmAsm
75 lines
2.0 KiB
ArmAsm
#===============================================================================
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# Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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#===============================================================================
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.text
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.align 3
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#include <AsmMacroIoLibV8.h>
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#include <IndustryStandard/ArmStdSmc.h>
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#include <Library/ArmLib.h>
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#include "MpServicesInternal.h"
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GCC_ASM_IMPORT (gApStacksBase)
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GCC_ASM_IMPORT (gProcessorIDs)
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GCC_ASM_IMPORT (ApProcedure)
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GCC_ASM_IMPORT (gApStackSize)
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GCC_ASM_IMPORT (gTcr)
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GCC_ASM_IMPORT (gTtbr0)
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GCC_ASM_IMPORT (gMair)
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GCC_ASM_EXPORT (ApEntryPoint)
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// Entry-point for the AP
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// VOID
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// ApEntryPoint (
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// VOID
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// );
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ASM_PFX(ApEntryPoint):
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// Configure the MMU and caches
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ldr x0, gTcr
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bl ArmSetTCR
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ldr x0, gTtbr0
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bl ArmSetTTBR0
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ldr x0, gMair
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bl ArmSetMAIR
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bl ArmDisableAlignmentCheck
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bl ArmEnableStackAlignmentCheck
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bl ArmEnableInstructionCache
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bl ArmEnableDataCache
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bl ArmEnableMmu
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mrs x0, mpidr_el1
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// Mask the non-affinity bits
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bic x0, x0, 0x00ff000000
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and x0, x0, 0xffffffffff
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ldr x1, gProcessorIDs
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mov x2, 0 // x2 = processor index
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// Find index in gProcessorIDs for current processor
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1:
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ldr x3, [x1, x2, lsl #3] // x4 = gProcessorIDs + x2 * 8
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cmp x3, #-1 // check if we've reached the end of gProcessorIDs
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beq ProcessorNotFound
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add x2, x2, 1 // x2++
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cmp x0, x3 // if mpidr_el1 != gProcessorIDs[x] then loop
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bne 1b
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// Calculate stack address
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// x2 contains the index for the current processor plus 1
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ldr x0, gApStacksBase
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ldr x1, gApStackSize
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mul x3, x2, x1 // x3 = (ProcessorIndex + 1) * gApStackSize
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add sp, x0, x3 // sp = gApStacksBase + x3
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mov x29, xzr
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bl ApProcedure // doesn't return
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ProcessorNotFound:
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// Turn off the processor
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MOV32 (w0, ARM_SMC_ID_PSCI_CPU_OFF)
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smc #0
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b .
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