a3a15d2108
2) Set the stack to be cacheable before the stack switch occurs so that IPF recovery path will be run from cacheble memory for code, data and stack. git-svn-id: https://edk2.svn.sourceforge.net/svnroot/edk2/trunk/edk2@4288 6f19259b-4bc3-4df7-8a09-765794883524
65 lines
2.0 KiB
C
65 lines
2.0 KiB
C
/*++
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Copyright (c) 2006, Intel Corporation
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All rights reserved. This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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Module Name:
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SwitchToCacheMode.c
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Abstract:
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Ipf CAR specific function used to switch to cache mode for the later memory access
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Revision History
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--*/
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#include "IpfPeiMain.h"
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#define RecoveryFn 0x03
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VOID
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SwitchToCacheMode (
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IN PEI_CORE_INSTANCE *CoreData
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)
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/*++
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Routine Description:
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Switch the PHIT pointers to cache mode after InstallPeiMemory in CAR.
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Arguments:
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CoreData - The PEI core Private Data
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Returns:
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--*/
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{
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EFI_HOB_HANDOFF_INFO_TABLE *Phit;
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if ((GetHandOffStatus().r10 & 0xFF) == RecoveryFn) {
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CoreData->StackBase = CoreData->StackBase & CACHE_MODE_ADDRESS_MASK;
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CoreData->HobList.Raw = (UINT8 *)((UINTN)CoreData->HobList.Raw & CACHE_MODE_ADDRESS_MASK);
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//
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// Change the PHIT pointer value to cache mode
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//
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Phit = CoreData->HobList.HandoffInformationTable;
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Phit->EfiMemoryTop = Phit->EfiMemoryTop & CACHE_MODE_ADDRESS_MASK;
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Phit->EfiFreeMemoryTop = Phit->EfiFreeMemoryTop & CACHE_MODE_ADDRESS_MASK;
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Phit->EfiMemoryBottom = Phit->EfiMemoryBottom & CACHE_MODE_ADDRESS_MASK;
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Phit->EfiFreeMemoryBottom = Phit->EfiFreeMemoryBottom & CACHE_MODE_ADDRESS_MASK;
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Phit->EfiEndOfHobList = Phit->EfiEndOfHobList & CACHE_MODE_ADDRESS_MASK;
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}
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return;
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}
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