83d1ffb92f
Two library instances are added to support BASE type and DXE type. Those libraries provides basic timer support using the ACPI timer hardware. The performance counter features are provided by the processors time stamp counter. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Gao, Liming <liming.gao@intel.com> Reviewed-by: Kinney, Michael D <michael.d.kinney@intel.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@15803 6f19259b-4bc3-4df7-8a09-765794883524
130 lines
6.9 KiB
Plaintext
130 lines
6.9 KiB
Plaintext
## @file
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# Public definitions for PcAtChipset package.
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#
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# This package is designed to public interfaces and implementation which follows
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# PcAt defacto standard.
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#
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# Copyright (c) 2009 - 2014, Intel Corporation. All rights reserved.<BR>
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#
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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##
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[Defines]
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DEC_SPECIFICATION = 0x00010005
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PACKAGE_NAME = PcAtChipsetPkg
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PACKAGE_GUID = B728689A-52D3-4b8c-AE89-2CE5514CC6DC
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PACKAGE_VERSION = 0.3
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[Includes]
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Include
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[LibraryClasses]
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## @libraryclass Provides functions to manage I/O APIC Redirection Table Entries.
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#
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IoApicLib|Include/Library/IoApicLib.h
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[Guids]
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gPcAtChipsetPkgTokenSpaceGuid = { 0x326ae723, 0xae32, 0x4589, { 0x98, 0xb8, 0xca, 0xc2, 0x3c, 0xdc, 0xc1, 0xb1 } }
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[PcdsFeatureFlag]
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## If TRUE, then the HPET Timer will be configured to use MSI interrupts if the HPET timer supports them.
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# If FALSE, then the HPET Timer will be configued to use I/O APIC interrupts.
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gPcAtChipsetPkgTokenSpaceGuid.PcdHpetMsiEnable|TRUE|BOOLEAN|0x00001000
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[PcdsFixedAtBuild, PcdsDynamic, PcdsDynamicEx, PcdsPatchableInModule]
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## Pcd8259LegacyModeMask defines the default mask value for platform. This value is determined
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# 1) If platform only support pure UEFI, value should be set to 0xFFFF or 0xFFFE;
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# Because only clock interrupt is allowed in legacy mode in pure UEFI platform.
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# 2) If platform install CSM and use thunk module:
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# a) If thunk call provided by CSM binary requires some legacy interrupt support, the corresponding bit
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# should be opened as 0.
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# For example, if keyboard interfaces provided CSM binary use legacy keyboard interrupt in 8259 bit 2, then
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# the value should be set to 0xFFFC
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# b) If all thunk call provied by CSM binary do not require legacy interrupt support, value should be set
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# to 0xFFFF or 0xFFFE.
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#
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# The default value of legacy mode mask could be changed by EFI_LEGACY_8259_PROTOCOL->SetMask(). But it is rarely
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# need change it except some special cases such as when initializing the CSM binary, it should be set to 0xFFFF to
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# mask all legacy interrupt. Please restore the original legacy mask value if changing is made for these special case.
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#
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gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeMask|0xFFFF|UINT16|0x00000001
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## Pcd8259LegacyModeEdgeLevel defines the default edge level for legacy mode's interrrupt controller.
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gPcAtChipsetPkgTokenSpaceGuid.Pcd8259LegacyModeEdgeLevel|0x0000|UINT16|0x00000002
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## This PCD specifies whether we need enable IsaAcpiCom1 device.
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gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom1Enable|TRUE|BOOLEAN|0x00000003
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## This PCD specifies whether we need enable IsaAcpiCom2 device.
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gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiCom2Enable|TRUE|BOOLEAN|0x00000004
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## This PCD specifies whether we need enable IsaAcpiPs2Keyboard device.
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gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2KeyboardEnable|TRUE|BOOLEAN|0x00000005
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## This PCD specifies whether we need enable IsaAcpiPs2Mouse device.
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gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiPs2MouseEnable|TRUE|BOOLEAN|0x00000006
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## This PCD specifies whether we need enable IsaAcpiFloppyA device.
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gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyAEnable|TRUE|BOOLEAN|0x00000007
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## This PCD specifies whether we need enable IsaAcpiFloppyB device.
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gPcAtChipsetPkgTokenSpaceGuid.PcdIsaAcpiFloppyBEnable|TRUE|BOOLEAN|0x00000008
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## This PCD specifies the base address of the HPET timer.
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gPcAtChipsetPkgTokenSpaceGuid.PcdHpetBaseAddress|0xFED00000|UINT32|0x00000009
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## This PCD specifies the Local APIC Interrupt Vector for the HPET Timer.
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gPcAtChipsetPkgTokenSpaceGuid.PcdHpetLocalApicVector|0x40|UINT8|0x0000000A
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## This PCD specifies the defaut period of the HPET Timer in 100 ns units.
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# The default value of 100000 100 ns units is the same as 10 ms.
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gPcAtChipsetPkgTokenSpaceGuid.PcdHpetDefaultTimerPeriod|100000|UINT64|0x0000000B
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## This PCD specifies the base address of the HPET timer.
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gPcAtChipsetPkgTokenSpaceGuid.PcdIoApicBaseAddress|0xFEC00000|UINT32|0x0000000C
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[PcdsFixedAtBuild, PcdsPatchableInModule]
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## Defines the ACPI register set base address.
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# The invalid 0xFFFF is as its default value. It must be configured to the real value.
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# @Prompt ACPI Timer IO Port Address
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPortBaseAddress |0xFFFF|UINT16|0x00000010
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## Defines the PCI Bus Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
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# @Prompt ACPI Hardware PCI Bus Number
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBusNumber | 0x00| UINT8|0x00000011
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## Defines the PCI Device Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
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# The invalid 0xFF is as its default value. It must be configured to the real value.
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# @Prompt ACPI Hardware PCI Device Number
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciDeviceNumber | 0xFF| UINT8|0x00000012
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## Defines the PCI Function Number of the PCI device that contains the BAR and Enable for ACPI hardware registers.
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# The invalid 0xFF is as its default value. It must be configured to the real value.
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# @Prompt ACPI Hardware PCI Function Number
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciFunctionNumber | 0xFF| UINT8|0x00000013
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## Defines the PCI Register Offset of the PCI device that contains the Enable for ACPI hardware registers.
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# The invalid 0xFFFF is as its default value. It must be configured to the real value.
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# @Prompt ACPI Hardware PCI Register Offset
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciEnableRegisterOffset |0xFFFF|UINT16|0x00000014
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## Defines the bit mask that must be set to enable the APIC hardware register BAR.
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# @Prompt ACPI Hardware PCI Bar Enable BitMask
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoBarEnableMask | 0x00| UINT8|0x00000015
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## Defines the PCI Register Offset of the PCI device that contains the BAR for ACPI hardware registers.
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# The invalid 0xFFFF is as its default value. It must be configured to the real value.
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# @Prompt ACPI Hardware PCI Bar Register Offset
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiIoPciBarRegisterOffset |0xFFFF|UINT16|0x00000016
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## Defines the offset to the 32-bit Timer Value register that resides within the ACPI BAR.
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# @Prompt Offset to 32-bit Timer register in ACPI BAR
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gPcAtChipsetPkgTokenSpaceGuid.PcdAcpiPm1TmrOffset |0x0008|UINT16|0x00000017
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