To make the code platform independent we should not use PcdArmPrimaryCore in libraries other than the platform specific libraries. Some platforms allow to change the primary core with external registers. These platforms do not use PcdArmPrimaryCore to identify the primary CPU. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Olivier Martin <olivier.martin@arm.com> git-svn-id: https://svn.code.sf.net/p/edk2/code/trunk/edk2@14938 6f19259b-4bc3-4df7-8a09-765794883524
128 lines
2.8 KiB
NASM
128 lines
2.8 KiB
NASM
//
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// Copyright (c) 2012-2013, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials
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// are licensed and made available under the terms and conditions of the BSD License
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// which accompanies this distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLib.h>
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#include <Base.h>
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#include <AutoGen.h>
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INCLUDE AsmMacroIoLib.inc
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EXPORT ArmPlatformStackSet
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EXPORT ArmPlatformStackSetPrimary
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EXPORT ArmPlatformStackSetSecondary
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IMPORT ArmPlatformIsPrimaryCore
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IMPORT ArmPlatformGetCorePosition
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IMPORT ArmPlatformGetPrimaryCoreMpId
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IMPORT _gPcd_FixedAtBuild_PcdCoreCount
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PRESERVE8
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AREA ArmPlatformStackLib, CODE, READONLY
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//VOID
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//ArmPlatformStackSet (
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// IN UINTN StackBase,
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// IN UINTN MpId,
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// IN UINTN PrimaryStackSize,
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// IN UINTN SecondaryStackSize
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// );
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ArmPlatformStackSet FUNCTION
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// Save parameters
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mov r6, r3
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mov r5, r2
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mov r4, r1
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mov r3, r0
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// Save the Link register
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mov r7, lr
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// Identify Stack
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mov r0, r1
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bl ArmPlatformIsPrimaryCore
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cmp r0, #1
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// Restore parameters
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mov r0, r3
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mov r1, r4
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mov r2, r5
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mov r3, r6
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// Restore the Link register
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mov lr, r7
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beq ArmPlatformStackSetPrimary
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bne ArmPlatformStackSetSecondary
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ENDFUNC
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//VOID
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//ArmPlatformStackSetPrimary (
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// IN UINTN StackBase,
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// IN UINTN MpId,
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// IN UINTN PrimaryStackSize,
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// IN UINTN SecondaryStackSize
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// );
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ArmPlatformStackSetPrimary FUNCTION
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mov r4, lr
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// Add stack of primary stack to StackBase
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add r0, r0, r2
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// Compute SecondaryCoresCount * SecondaryCoreStackSize
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LoadConstantToReg (_gPcd_FixedAtBuild_PcdCoreCount, r1)
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ldr r1, [r1]
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sub r1, #1
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mul r3, r3, r1
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// Set Primary Stack ((StackBase + PrimaryStackSize) + (SecondaryCoresCount * SecondaryCoreStackSize))
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add sp, r0, r3
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bx r4
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ENDFUNC
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//VOID
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//ArmPlatformStackSetSecondary (
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// IN UINTN StackBase,
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// IN UINTN MpId,
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// IN UINTN PrimaryStackSize,
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// IN UINTN SecondaryStackSize
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// );
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ArmPlatformStackSetSecondary FUNCTION
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mov r4, lr
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mov sp, r0
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// Get Core Position
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mov r0, r1
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bl ArmPlatformGetCorePosition
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mov r5, r0
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// Get Primary Core Position
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bl ArmPlatformGetPrimaryCoreMpId
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bl ArmPlatformGetCorePosition
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// Get Secondary Core Position. We should get consecutive secondary stack number from 1...(CoreCount-1)
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cmp r5, r0
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subhi r5, r5, #1
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add r5, r5, #1
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// Compute top of the secondary stack
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mul r3, r3, r5
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// Set stack
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add sp, sp, r3
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bx r4
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ENDFUNC
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END
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